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» Identification of Efficient Clustering Techniques for Test Power Activity on the Layout




Author:

Harshad Dhotre, Stephan Eggersglüß, Rolf Drechsler
Conference:
26th IEEE Asian Test Symposium (ATS)
Reference:

Taipei, Taiwan, 2017
Hyperlink:

[Link to the Conference]



» More than true or false: Native Support of Irregular Values in the Automatic Validation & Verification of UML/OCL Models




Author:

Nils Przigoda, Philipp Niemann, Judith Peters, Frank Hilken, Robert Wille, Rolf Drechsler
Conference:
15th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE)
Reference:

Vienna, Austria, 2017
Hyperlink:

[Link to the Conference]
PDF:

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» Yise - A novel Framework for Boolean Networks using Y-Inverter Graphs




Author:

Arun Chandrasekharan, Daniel Große, Rolf Drechsler
Conference:
15th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE)
Reference:

Vienna, Austria, 2017
Hyperlink:

[Link to the Conference]



» Reconfigurable TAP Controllers with Embedded Compression for Large Test Data Volume




Author:

Sebastian Huhn, Stephan Eggersglüß, Rolf Drechsler
Conference:
30th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
Reference:

Cambridge, UK, 2017
Hyperlink:

[Link to the Conference]
PDF:

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» Machine Learning Based Test Pattern Analysis for Localizing Critical Power Activity Areas




Author:

Harshad Dhotre, Stephan Eggersglüß, Mehdi Dehbashi, Ulrike Pfannkuchen, Rolf Drechsler
Conference:
30th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
Reference:

Cambridge, UK, 2017
Hyperlink:

[Link to the Conference]
PDF:

[click here]



» Unintrusive Aging Analysis based on Offline Learning




Author:

Frank Sill Torres, Pedro F. R. Leite Junior and Rolf Drechsler
Conference:
30th IEEE Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
Reference:

Cambridge, UK, 2017
Hyperlink:

[Link to the Conference]



» Towards Early Validation of Firmware-Based Power Management using Virtual Prototypes: A Constrained Random Approach




Author:

Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Conference:
Forum on specification & Design Languages (FDL)
Reference:

Verona, Italy, 2017
Hyperlink:

[Link to the Conference]



» Semi-Formal Cycle-Accurate Temporal Execution Traces Reconstruction




Author:

Rehab Massoud, Jannis Stoppe, Daniel Große, Rolf Drechsler
Conference:
15th International Conference on Formal Modelling and Analysis of Timed Systems (FORMATS)
Reference:

Berlin, Germany, 2017
Hyperlink:

[Link to the Conference]
PDF:

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» Early SoC Security Validation by VP-based Static Information Flow Analysis




Author:

Muhammad Hassan, Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Conference:
International Conference on Computer Aided Design (ICCAD)
Reference:

Irvine, USA, 2017
Hyperlink:

[Link to the Conference]



» Self-practicing of logic circuits through mobile devices: Lecturers' and students' perceptions




Author:

Mazyar Seraj, Cornelia Große, Rolf Drechsler
Conference:
9th annual International Conference on Education and New Learning Technologies (EduLearn17)
Reference:

Barcelona, Spain, 2017
Hyperlink:

[Link to the Conference]
PDF:

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» BioViz: An Interactive Visualization Engine for Digital Microfluidic Biochips




Author:

Jannis Stoppe, Oliver Keszöcze, Maximilian Luenert, Robert Wille, Rolf Drechsler
Conference:
IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Reference:

Bochum, Germany, 2017
Hyperlink:

[Link to the Conference]
PDF:

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» Towards Making Fault Injection on Abstract Models a More Accurate Tool for Predicting RT-Level Effects




Author:

Tino Flenker, Jan Malburg, Goerschwin Fey, Serhiy Avramenko, Massimo Violante and Matteo Sonza Reorda
Conference:
IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Reference:

Bochum, Germany, 2017
Hyperlink:

[Link to the Conference]
PDF:

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» Towards VHDL-based Design of Reversible Circuits




Author:

Zaid Al-Wardi, Robert Wille, Rolf Drechsler
Conference:
Reversible Computation
Reference:

Kolkata, India, 2017
Hyperlink:

[Link to the Conference]
PDF:

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» Efficient Construction of QMDDs for Irreversible, Reversible and Quantum Functions




Author:

Philipp Niemann, Alwin Zulehner, Robert Wille, Rolf Drechsler
Conference:
Reversible Computation
Reference:

pp. 214-231, Kolkata, India, 2017
Hyperlink:

[Link to the Conference]
PDF:

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» Mapping Abstract and Concrete Hardware Models for Design Understanding




Author:

Tino Flenker, Görschwin Fey
Conference:
IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
Reference:

Dresden, Germany, 2017
Hyperlink:

[Link to the Conference]
PDF:

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» An Adaptive Prioritized ε-Preferred Evolutionary Algorithm for Approximate BDD Optimization




Author:

Saeideh Shirinzadeh, Mathias Soeken, Daniel Große, Rolf Drechsler
Conference:
Genetic and Evolutionary Computation Conference (GECCO)
Reference:

Berlin, Germany, 2017
Hyperlink:

[Link to the Conference]
PDF:

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» Hiding Higher-Order Side-Channel Leakage - Randomizing Cryptographic Implementations in Reconfigurable Hardware




Author:

Pascal Sasdrich, Amir Moradi, Tim Güneysu
Conference:
RSA Conference Cryptographers’ Track (CT-RSA)
Reference:

San Francisco, US, 2017.
Hyperlink:

[Link to the Conference]
PDF:

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» ProACt: A Processor for High Performance On-demand Approximate Computing




Author:

Arun Chandrasekharan, Daniel Große, Rolf Drechsler
Conference:
27th ACM Great Lakes Symposium on VLSI (GLSVLSI)
Reference:

Banff, Alberta, Canada, 2017
Hyperlink:

[Link to the Conference]
PDF:

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» OR-Inverter Graphs for the Synthesis of Optical Circuits




Author:

Arighna Deb, Robert Wille, Rolf Drechsler
Conference:
47th International Symposium on Multiple-Valued Logic (ISMVL)
Reference:

Novi Sad, Serbia, 2017
Hyperlink:

[Link to the Conference]



» Extensions to the Reversible Hardware Description Language SyReC




Author:

Zaid Al-Wardi, Robert Wille, Rolf Drechsler
Conference:
47th International Symposium on Multiple-Valued Logic (ISMVL)
Reference:

Novi Sad, Serbia, 2017
Hyperlink:

[Link to the Conference]
PDF:

[click here]




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