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Dr. Hongyan Zhang
Testing of Reversible Circuits, 2013
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Dr. Beate Kapturek
Vorgehensmodelle für die Technische Dokumentation Eingebetteter Systeme, 2013
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Dr. Daniel Tille
Advanced Utilization of Formal Methods in Automatic Test Pattern Generation for Industrial Designs, 2011
also presented at Student-Forum: ETS 2009
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Dr. Stephan Eggersglüß
Robust Algorithms for High Quality Test Pattern Generation Using Boolean Satisfiability, 2010
also presented at PhD-Forum: DATE 2009
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Dr. André Sülflow
WoLFram – A Word Level Framework for Formal Verification and its Application, 2010
also presented at PhD-Forum: DATE 2011
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Dr. Robert Wille
Towards a Design Flow for Reversible Logic, 2009
also presented at PhD-Forum: DAC 2009
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Dr. Ulrich Kühne
Advanced Automation in Formal Verification of Processors, 2009
also presented at PhD-Forum: DATE 2010
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Dr. Frank Rogin
An Integrated Approach to Utilize Designer´s Debug Capacity in System-on-a-Chip Designs, 2009
also presented at PhD-Forum: DATE 2009
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Dr. Daniel Große
Quality-Driven Design and Verification Flow for Digital Systems, 2008
also presented at PhD-Forum: DATE 2008
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Dr. Sebastian Kinder
Automated Validation and Verification of Railway Specific Components and Systems, 2008
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Dr. Junhao Shi
Boolean Techniques in Testing of Digital Circuits, 2007
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Dr. Görschwin Fey
Increasing Robustness and Usability of Circuit Design Tools by Using Formal Techniques, 2006
also presented at PhD-Forum: DATE 2007
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