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Group of Computer Architecture / AGRA | Computer Science | Faculty 03 | University of Bremen

Journals


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Trends and challenges in design of embedded BCH error correction codes in multi-levels NAND flash memory devices
Author: Saeideh Nabipour, Javad Javidan, Rolf Drechsler
Journal: Memories-Materials, Devices, Circuits and Systems
Details: DOI: 10.1016/j.memori.2024.100099
Year: 2024

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Special issue on in-memory computing: Circuits, system, architecture and verification
Author: Kamalika Datta, Rolf Drechsler
Journal: Memories-Materials, Devices, Circuits and Systems
Details: DOI: 10.1016/j.memori.2023.100062, Volume 5
Year: 2023

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Should We Even Optimize for Execution Energy? Rethinking Mapping for MAGIC Design Style
Author: Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Phrangboklang Lyngton Thangkhiew, Vikas Rana, Sachin Patkar, Rolf Drechsler, Farhad Merchant
Journal: IEEE Embedded Systems Letters (ESL)
Details: DOI: 10.1109/LES.2023.3298740
Year: 2023

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Synergistic Verification of Hardware Peripherals through Virtual Prototype Aided Cross-Level Methodology Leveraging Coverage-Guided Fuzzing and Co-Simulation
Author: Sallar Ahmadi-Pour, Mathis Logemann, Vladimir Herdt, Rolf Drechsler
Journal: Chips
Details: DOI: 10.3390/chips2030012, Volume 2, Issue 3, pp. 195-208
Year: 2023

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ReSG: A Data Structure for Verification of Majority based In-Memory Computing on ReRAM Crossbars
Author: Kousik Bhunia, Arighna Deb, Kamalika Datta, Muhammad Hassan, Saeideh Shirinzadeh, Rolf Drechsler
Journal: ACM Transactions on Embedded Computing Systems
Details: DOI: 10.1145/3615358
Year: 2023

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KI-gestützte Optimierung repetitiver Prozesse - Eine Kodierungstechnik für repetitive Prozesse in der evolutionären Optimierung
Author: Christina Plump, Bernhard J. Berger, Rolf Drechsler
Journal: Industrie 4.0 Management
Details: DOI: 10.30844/IM_23-1_19-22, IM 39, pp. 19-22
Year: 2023

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AI-Driven and Automated MRI Sequence Optimization in Scanner-Independent MRI Sequences Formulated by a Domain-Specific Language
Author: Daniel Christopher Hoinkiss, Jörn Huber, Christina Plump, Christoph Lüth, Rolf Drechsler, Matthias Günther
Journal: Frontiers in Neuroimaging
Details: DOI: 10.3389/fnimg.2023.1090054, Volume 2-2023
Year: 2023

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Impact of Sneak Paths on In-Memory Logic Design in Memristive Crossbars Information Technology
Author: Kamalika Datta, Arighna Deb, Abhoy Kole, Rolf Drechsler
Journal: it-Information Technology
Details: DOI: 10.1515/itit-2023-0020
Year: 2023

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A Novel Default Risk Prediction and Feature Importance Analysis Technique for Marketplace Lending using Machine Learning
Author: Sana Hassan Imam, Sebastian Huhn, Lars Hornuf, Rolf Drechsler
Journal: Journal of Credit and Capital Markets
Details: DOI: 10.3790/ccm.56.1.27, Vol. 56 (2023), Iss. 1 : pp. 27–62
Year: 2023

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MARADIV: Library of MAGIC based Approximate Restoring Array Divider Benchmark Circuits for In-Memory Computing Using Memristors
Author: Chandan Kumar Jha, Sallar Ahmadi-Pour, Rolf Drechsler
Journal: IEEE Transactions on Circuits and Systems II: Express Briefs
Details: DOI: 10.1109/TCSII.2023.3242976, Volume: 70 Issue: 7
Year: 2023

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Specification-based Symbolic Execution for Stateful Network Protocol Implementations in the IoT
Author: Sören Tempel, Vladimir Herdt, Rolf Drechsler
Journal: IEEE Internet of Things Journal
Details: DOI: 10.1109/JIOT.2023.3236694, Volume: 10 Issue: 11
Year: 2023

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IMAGIN: Library of IMPLY and MAGIC NOR Based Approximate Adders for In-Memory Computing
Author: Chandan Kumar Jha, Phrangboklang Lyngton Thangkhiew, Kamalika Datta, Rolf Drechsler
Journal: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Details: DOI: 10.1109/JXCDC.2022.3222015, Volume: 8 Issue: 2
Year: 2022

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The MicroRV32 framework: An Accessible and Configurable Open Source RISC-V Cross-Level Platform for Education and Research
Author: Sallar Ahmadi-Pour, Vladimir Herdt, Rolf Drechsler
Journal: Journal of Systems Architecture - Embedded Software Design (JSA)
Details: DOI: 10.1016/j.sysarc.2022.102757, Volume 133, 2022
Year: 2022

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Advanced Embedded System Modeling and Simulation in an Open Source RISC-V Virtual Prototype
Author: Pascal Pieper, Vladimir Herdt and Rolf Drechsler
Journal: Journal of Low Power Electronics and Applications
Details: DOI: 10.3390/jlpea12040052, 12(4):52
Year: 2022

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Feed-Forward learning algorithm for resistive memories
Author: Dev Narayan Yadav, Phrangboklang Lyngton Thangkhiew, Kamalika Datta, Sandip Chakraborty, Rolf Drechsler and Indranil Sengupta
Journal: Journal of System Architecture (JSA)
Details: DOI: 10.1016/j.sysarc.2022.102730, 131 (2022) 102730
Year: 2022

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FAMCroNA: Fault Analysis in Memristive Crossbars for Neuromorphic Applications
Author: Dev Narayan Yadav, Phrangboklang Lyngton Thangkhiew, Kamalika Datta, Sandip Chakraborty, Rolf Drechsler, Indranil Sengupta
Journal: Journal of Electronic Testing, Springer
Details: DOI: 10.1007/s10836-022-06001-2, Volume 38, pages 145–163 (2022)
Year: 2022

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Early SoCs Information Flow Policies Validation using SystemC-based Virtual Prototypes at the ESL
Author: Mehran Goli, Rolf Drechsler
Journal: ACM Transactions on Embedded Computing Systems (TECS)
Details: DOI: 10.1145/3544780
Year: 2022

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Equivalence Checking of System-Level and SPICE-Level Models of Linear Circuits
Author: Kemal Çağlar Coşkun, Muhammad Hassan, Rolf Drechsler
Journal: Chips
Details: DOI 10.3390/chips1010006, Volume 1, Issue 1, pp. 54-71
Year: 2022

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Power-aware Test Scheduling Framework for IEEE 1687 Multi-Power Domain Networks using Formal Techniques
Author: Payam Habiby, Sebastian Huhn, Rolf Drechsler
Journal: Microelectronics Reliability
Details: DOI: 10.1016/j.microrel.2022.114551, Volume 134, pp. 1-11
Year: 2022

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Towards Quantification and Visualization of the Effects of Concretization during Concolic Testing
Author: Sören Tempel, Vladimir Herdt, Rolf Drechsler
Journal: IEEE Embedded Systems Letters (ESL)
Details: DOI: 10.1109/LES.2022.3171603, Volume: 14 Issue: 4
Year: 2022

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CoMIC: Complementary Memristor based in-memory computing in 3D architecture
Author: F. Lalchhandama, Kamalika Datta, S. Chakraborty, Rolf Drechsler, I. Sengupta
Journal: Journal of Systems Architecture (JSA)
Details: DOI: 10.1016/j.sysarc.2022.102480, Volume 126, Article 102480
Year: 2022

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Template-based mapping of reversible circuits to IBM quantum computers
Author: Philipp Niemann, Alexandre A. A. de Almeida, Gerhard Dueck, Rolf Drechsler
Journal: Microprocessors and Microsystems (MICPRO)
Details: DOI: 10.1016/j.micpro.2022.104487, Volume 90, April 2022
Year: 2022

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SymEx-VP: An Open Source Virtual Prototype for OS-Agnostic Concolic Testing of IoT Firmware
Author: Sören Tempel, Vladimir Herdt, Rolf Drechsler
Journal: Journal of Systems Architecture - Embedded Software Design (JSA)
Details: DOI: 10.1016/ j.sysarc.2022.102456, Volume 126
Year: 2022

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Unlocking Approximation for In-Memory Computing with Cartesian Genetic Programming and Computer Algebra for Arithmetic Circuits
Author: Saman Fröhlich, Rolf Drechsler
Journal: it-Information Technology
Details: DOI: 10.1515/itit-2021-0042
Year: 2022

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Verzahnung von Data Stewardship und Data Science – Wege und Perspektiven
Author: Lena Steinmann, Rolf Drechsler
Journal: Bausteine Forschungsdatenmanagement
Details: DOI: 10.17192/bfdm.2021.3.8342, Nummer 3, pp. 83-91
Year: 2021

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Disziplinübergreifendes Modell zur Ausbildung von Forschungsdatenmanagement und Data Science Kompetenzen: „Data Train – Training in Research Data Management and Data Science“
Author: Tanja Hörner, Frank Oliver Glöckner, Rolf Drechsler, Iris Pigeot
Journal: Bausteine Forschungsdatenmanagement
Details: DOI: 10.17192/bfdm.2021.3.8343, Nummer 3, pp. 57-69
Year: 2021

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Experimental Methods to Enable High-Throughput Characterization of New Structural Materials
Author: Nils Ellendt, Brigitte Clausen, Nicole Mensching, Daniel Meyer, Christina Plump, Heike Sonnenberg, Matthias Steinbacher, Anastasiya Tönjes
Journal: JOM: the journal of the Minerals, Metals & Materials Society
Details: DOI: 10.1007/s11837-021-04901-w, JOM 73, 3347–3355
Year: 2021

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Advanced Virtual Prototyping for Cyber-Physical Systems using RISC-V: Implementation, Verification and Challenges
Author: Vladimir Herdt, Rolf Drechsler
Journal: Science China Information Sciences (SCIS)
Details: DOI: 10.1007/s11432-020-3308-4
Year: 2021

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RevSCA-2.0: SCA-based Formal Verification of Non-trivial Multipliers using Reverse Engineering and Local Vanishing Removal
Author: Alireza Mahzoon, Daniel Große, Rolf Drechsler
Journal: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)
Details: DOI: 10.1109/TCAD.2021.3083682, Volume: 41 Issue: 5, pp.1573-1586
Year: 2021

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Towards RISC-V CSR Compliance Testing
Author: Niklas Bruns, Vladimir Herdt, Daniel Große, Rolf Drechsler
Journal: IEEE Embedded Systems Letters (ESL)
Details: DOI: 10.1109/LES.2021.3077368, Volume: 13 Issue: 4, pp. 202-205
Year: 2021

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Parallel Computing of Graph-Based functions in ReRAM
Author: Saman Fröhlich, Saeideh Shirinzadeh, Rolf Drechsler
Journal: Journal on Emerging Technologies in Computing Systems (JETC)
Details: DOI: 10.1145/3453163, Volume 18, Issue 2, Article No. 41, pp 1–2
Year: 2021

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An ant colony based mapping of quantum circuits to nearest neighbor architectures
Author: Anirban Bhattacharjee, Chandan Bandyopadhyay, Angshu Mukherje, Robert Wille, Rolf Drechsler, Hafizur Rahamana
Journal: Integration
Details: DOI: 10.1016/j.vlsi.2020.12.002, Volume 78, May 2021, Pages 11-24
Year: 2021

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Adaptive Simulation with Virtual Prototypes in an Open-Source RISC-V Evaluation Platform
Author: Vladimir Herdt, Daniel Große, Sören Tempel, Rolf Drechsler
Journal: Journal of Systems Architecture - Embedded Software Design (JSA)
Details: DOI: 10.1016/j.sysarc.2021.102135, Volume 116
Year: 2021

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Through the Looking Glass: Automated Design Understanding of SystemC-based VPs at the ESL
Author: Mehran Goli, Rolf Drechsler
Journal: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)
Details: DOI: 10.1109/TCAD.2021.3074050, Volume: 41 Issue: 4, pp. 1181-1185
Year: 2021

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On the Difficulty of Inserting Trojans in Reversible Computing Architectures
Author: Xiaotong Cui, Samah Mohamed Saeed, Alwin Zulehner, Robert Wille, Kaijie Wu, Rolf Drechsler, Ramesh Karri
Journal: IEEE Transactions on Emerging Topics in Computing
Details: DOI 10.1109/TETC.2018.2823315, Volume: 8, Issue: 4, Oct.-Dec. 1 2020
Year: 2020

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An Improved Heuristic Technique for Nearest Neighbor Realization of Quantum Circuits in 2D Architecture
Author: Anirban Bhattacharjee, Chandan Bandyopadhyay, Philipp Niemann, Bappaditya Mondal, Rolf Drechsler, Hafizur Rahaman
Journal: Integration
Details: DOI 10.1016/j.vlsi.2020.09.003, Volume 76, January 2021, Pages 40-54
Year: 2020

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Improving the Designs of Nearest Neighbor Quantum Circuits for 1D and 2D Architectures
Author: Chandan Bandyopadhyay, Anirban Bhattacharjee, Robert Wille, Rolf Drechsler, Hafizur Rahaman
Journal: IETE Journal of Research
Details: DOI: 10.1080/03772063.2020.1822215, Volume 69, 2023 - Issue 1, pp. 340-353
Year: 2020

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ReCoFused partial reconfiguration for secure moving-target countermeasures on FPGAs
Author: Buse Ustaoğlu, Kenneth Schmitz, Daniel Große, Rolf Drechsler
Journal: SN Applied Sciences | Springer Nature
Details: DOI 10.1007/s42452-020-3003-x, Article number: 1363 (2020)
Year: 2020

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Advanced Exact Synthesis of Clifford+T Circuits
Author: Philipp Niemann, Robert Wille, Rolf Drechsler
Journal: Quantum Information Processing
Details: DOI: 10.1007/s11128-020-02816-0, 19, Article number: 317 (2020)
Year: 2020

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Overcoming the Trade-off Between Accuracy and Compactness in Decision Diagrams for Quantum Computation
Author: Philipp Niemann, Alwin Zulehner, Rolf Drechsler, Robert Wille
Journal: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2020.2977603, Volume: 39 Issue: 12
Year: 2020

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On the Impact of the Synchronization Constraint and Interconnections in Quantum-dot Cellular Automata
Author: Frank Sill Torres, Pedro A. Silva, Geraldo Fontes, Marcel Walter, José Augusto M. Nacif, Ricardo Santos Ferreira, Omar Paranaiba Vilela Neto, Jeferson F. Chaves, Robert Wille, Philipp Niemann, Daniel Große, Rolf Drechsler
Journal: Microprocessors and Microsystems (MICPRO)
Details: DOI: 10.1016/j.micpro.2020.103109, Volume 76, July 2020
Year: 2020

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PREASC: Automatic Portion Resilience Evaluation for Approximating SystemC-based Designs using Regression Analysis Techniques
Author: Mehran Goli, Rolf Drechsler
Journal: ACM Transactions on Design Automation of Electronic Systems (TODAES)
Details: DOI: 10.1145/3388140, Volume: 25, number: 5, numpages: 28
Year: 2020

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RISC-V based Virtual Prototype: An Extensible and Configurable Platform for the System-level
Author: Vladimir Herdt, Daniel Große, Pascal Pieper, Rolf Drechsler
Journal: Journal of Systems Architecture - Embedded Software Design (JSA)
Details: DOI: 10.1016/j.sysarc.2020.101756, Volume 109
Year: 2020

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Reversible Circuits: IC/IP Piracy Attacksand Countermeasures
Author: Samah Mohamed Saeed, Alwin Zulehner, Robert Wille, Rolf Drechsler and Ramesh Karri
Journal: IEEE Transactions On Very Large Scale Integration (VLSI) Systems
Details: DOI: 10.1109/TVLSI.2019.2934465, Volume: 27 Issue: 11, pp. 1-13
Year: 2019

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Near Zero-Energy Computation Using Quantum-dot Cellular Automata
Author: Frank Sill Torres, Robert Wille, Philipp Niemann, Rolf Drechsler
Journal: Journal on Emerging Technologies in Computing Systems (JETC)
Details: DOI 10.1145/3365394,Vol. 16, No. 1
Year: 2019

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Designing Partially Reversible Field-Coupled Nanocomputing Circuits
Author: Jeferson Figueiredo Chaves, Marco Ribeiro, Frank Sill Torres, Omar Paranaiba Vilela Neto
Journal: IEEE Transactions on Nanotechnology
Details: DOI: 10.1109/TNANO.2019.2918057, Volume 18, Issue: 1, pp. 589-597
Year: 2019

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Placement & Routing for Tile-based Field-coupled Nanocomputing Circuits is NP-complete
Author: Marcel Walter, Robert Wille, Daniel Große, Frank Sill Torres, Rolf Drechsler
Journal: Journal on Emerging Technologies in Computing Systems (JETC)
Details: DOI: 10.1145/3312661, Volume 15, Issue 3, Number 29
Year: 2019

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Combining Sequentialization-based Verification of Multi-Threaded C Programs with Symbolic Partial Order Reduction
Author: Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Journal: International Journal of Software Tools for Technology Transfer (STTT)
Details: DOI: 10.1007/s10009-019-00507-5, 21(5):545-565
Year: 2019

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Security Validation of VP-based SoCs Using Dynamic Information Flow Tracking
Author: Mehran Goli, Muhammad Hassan, Daniel Große, Rolf Drechsler
Journal: it-Information Technology
Details: DOI: 10.1515/itit-2018-0027
Year: 2019

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Automated Non-intrusive Analysis of Electronic System Level Designs
Author: Mehran Goli, Jannis Stoppe, Rolf Drechsler
Journal: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2018.2889665, Volume: 39, number: 2, pages: 492-505
Year: 2020

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Determining Application-specific Knowledge for Improving Robustness of Sequential Circuits
Author: Sebastian Huhn, Stefan Frehse, Robert Wille, Rolf Drechsler
Journal: IEEE Transactions On Very Large Scale Integration (VLSI) Systems
Details: DOI: 10.1109/TVLSI.2018.2890601, Volume 27, Number 4, Pages. 875-887
Year: 2019

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The complexity of error metrics
Author: Oliver Keszöcze, Mathias Soeken, Rolf Drechsler
Journal: Information Processing Letters
Details: DOI: 10.1016/j.ipl.2018.06.010, Volume 139, pp. 1-7
Year: 2018

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On the complexity of design tasks for Digital Microfluidic Biochips
Author: Oliver Keszöcze, Philipp Niemann, Arved Friedemann, Rolf Drechsler
Journal: Microelectronics Journal
Details: DOI: 10.1016/j.mejo.2018.05.013, Volume 78, Pages 35-45
Year: 2018

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Measurement and evaluation of calorimetric descriptors for the suitability for evolutionary high-throughput material development
Author: Anastasiya Toenjes, Heike Sonnenberg, Christina Plump, Rolf Drechsler, Axel von Hehl
Journal: Metals
Details: DOI: 10.3390/met9020149, Volume 9 (2), 149;
Year: 2019

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Evaluation of (power) side-channels in cryptographic implementations
Author: Florian Bache, Christina Plump, Jonas Wloka, Tim Güneysu, and Rolf Drechsler
Journal: it – Information Technology
Details: DOI: 10.1515/itit-2018-0028, Volume 61(1)
Year: 2019

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"Copying allowed - But be careful, errors included!" - Effects of copying correct and incorrect solutions on learning outcomes
Author: Cornelia Große
Journal: Learning and Instruction
Details: DOI: 10.1016/j.learninstruc.2018.06.004, Volume 58, pp. 173-181
Year: 2018

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Arduinos in der Schule - Lernen mit Mikrocontrollern
Author: Cornelia Große, Claudia Sobich, Sebastian Huhn, Markus Leuschner, Rolf Drechsler, Lutz Mädler
Journal: Computer + Unterricht
Details: Volume 110, May 2018, Pages 43-45
Year: 2018

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Analysis of Total Ionizing Dose effects for highly scaled CMOS devices in Low Earth Orbit
Author: Muhammad Sajida, Nikolay Chechenin, Frank Sill Torres, Muhammad Nabeel Hanif, Usman Ali Gulzari, Shakaib Arslan, Ehsan Ullah Khan
Journal: Nuclear Instruments & Methods in Physics Research Section B-Beam Interactions with Materials and Atoms
Details: DOI: 10.1016/j.nimb.2018.05.014, Volume 428, Pages 30-37
Year: 2018

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Verifying SystemC using Intermediate Verification Language and Stateful Symbolic Simulation
Author: Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems (TCAD)
Details: DOI: 10.1109/TCAD.2018.2846638, 38(7):1359-1372
Year: 2018

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Logic synthesis for RRAM-based in-memory computing
Author: Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Rolf Drechsler
Journal: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2017.2750064, Vol. 37, no. 7, pp. 1422-1435
Year: 2018

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Behaviour Driven Development for Hardware Design
Author: Melanie Diepenbeck, Ulrich Kühne, Mathias Soeken, Daniel Große, Rolf Drechsler
Journal: IPSJ Transactions on System LSI Design Methodology
Details: DOI: 10.2197/ipsjtsldm.11.29, Vol. 11, pp. 29-45, PDF Download
Year: 2018

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An Automated Approach for Generating and Checking Control Logic for Reversible Hardware Description Language-Based Designs
Author: Robert Wille, Oliver Keszöcze, Larts Othmer, Michael Kirkedal Thomsen, Rolf Drechsler
Journal: Journal of Low Power Electronics
Details: DOI: 10.1166/jolpe.2017.1515, Volume 13, Number 4, Pages 633-641
Year: 2017

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An Energy-aware Model for the Logic Synthesis of Quantum-Dot Cellular Automata
Author: Frank Sill Torres, Robert Wille, Philipp Niemann, Rolf Drechsler
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2018.2789782, Vol. 37, no. 12, pp. 3031-3041
Year: 2018

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Frame Conditions in the Automatic Validation and Verification of UML/OCL Models: A Symbolic Formulation of modifies only Statements
Author: Nils Przigoda, Philipp Niemann, Jonas Gomes Filho, Robert Wille, Rolf Drechsler
Journal: Computer Languages, Systems & Structures
Details: DOI: 10.1016/j.cl.2017.11.002, Volume 54, Pages 512-527
Year: 2018

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Synthesis of optical circuits using binary decision diagrams
Author: Arighna Deb, Robert Wille, Oliver Keszöcze, Saeideh Shirinzadeh, Rolf Drechsler
Journal: Integration, the VLSI Journal
Details: DOI: 10.1016/j.vlsi.2017.05.001, Volume 59, September 2017, Pages 42–51
Year: 2017

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A PLiM computer for the IoT
Author: Mathias Soeken, Pierre-Emmanuel Gaillardon, Saeideh Shirinzadeh, Rolf Drechsler, Giovanni De Micheli
Journal: Computer
Details: DOI: 10.1109/MC.2017.173, 50(6):35-40
Year: 2017

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Information reconciliation schemes in physical-layer security: A survey
Author: Christopher Huth, Rene Guillaume, Thomas Strohm, Paul Duplys, Irin Ann Samuel, Tim Güneysu
Journal: Computer Networks
Details: DOI: 10.1016/j.comnet.2016.06.014, 109: 84-104
Year: 2016

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Towards a Verification Flow Across Abstraction Levels:
Verifying Implementations Against Their Formal Specification

Author: Pablo Gonzalez-de-Aledo, Nils Przigoda, Robert Wille, Rolf Drechsler, Pablo Sanchez
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2016.2611494, 36(3):475-488
Year: 2017

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metaSMT: Focus On Your Application And Not On Solver Integration
Author: Heinz Riener, Finn Haedicke, Stefan Frehse, Mathias Soeken, Daniel Große, Rolf Drechsler, Görschwin Fey
Journal: International Journal of Software Tools for Technology Transfer
Details: DOI 10.1007/s10009-016-0426-1, 19(5):605-621
Year: 2017

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Effects of multiple choice options in mathematics learning
Author: Cornelia Große
Journal: European Journal of Science and Mathematics Education
Details: Volume 5, Number 2, pp 165-177
Year: 2017

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Debugging hardware designs using dynamic dependency graphs
Author: Jan Malburg, Alexander Finder, Görschwin Fey
Journal: Microprocessors and Microsystems (MICPRO)
Details: DOI: 10.1016/j.micpro.2016.10.004
Year: 2016

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Verifying the Structure and Behavior in UML/OCL Models Using Satisfiability Solvers
Author: Nils Przigoda, Mathias Soeken, Robert Wille, Rolf Drechsler
Journal: IET Cyber-Physical Systems: Theory & Applications
Details: DOI: 10.1049/iet-cps.2016.0022, Volume 1, Issue 1, pp. 49-59
Year: 2016

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Empirical Results on Parity-based Soft Error Detection with Software-based Retry
Author: Gökçe Aydos, Görschwin Fey
Journal: Microprocessors and Microsystems (MICPRO)
Details: DOI: 10.1016/j.micpro.2016.09.009, Volume 48
Year: 2016

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Gates vs. Splitters: Contradictory Optimization Objectives in the Synthesis of Optical Circuits
Author: Arighna Deb, Robert Wille, Oliver Keszöcze, Stefan Hillmich, Rolf Drechsler
Journal: Journal on Emerging Technologies in Computing Systems (JETC)
Details: DOI: 10.1145/2904445, Volume 13, Issue 1
Year: 2016

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Reversible Synthesis of Symmetric Functions with a Simple Regular Structure and Easy Testability
Author: Arighna Deb, Debesh K. Das, Hafizur Rahaman, Robert Wille, Rolf Drechsler, Bhargab B. Bhattacharya
Journal: Journal on Emerging Technologies in Computing Systems (JETC)
Details: DOI: 10.1145/2894757, Volume 12 Issue 4, Article No. 34
Year: 2016

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On Optimization-based ATPG and its Application for Highly Compacted Test Sets
Author: Stephan Eggersglüß, Kenneth Schmitz, Rene Krenz-Baath, Rolf Drechsler
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2016.2552822, Vol. 35(12), pp. 2104-2117
Year: 2016

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Time-resolved detection of diffusion limited temperature gradients inside single isolated burning droplets using Rainbow Refractometry
Author: Christopher Rosebrock, Saeideh Shirinzadeh, Mathias Soeken, Norbert Riefler, Thomas Wriedt, Rolf Drechsler, Lutz Mädler
Journal: Combustion and Flame
Details: DOI: 10.1016/j.combustflame.2016.03.007, Volume 168, June 2016, Pages 255–269
Year: 2016

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Online collaborative learning in dyads: Effects of knowledge distribution and awareness
Author: Michail D. Kozlov, Cornelia Große
Journal: Computers in Human Behavior
Details: DOI: 10.1016/j.chb.2016.01.043, Volume 59, 389-401
Year: 2016

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Complexity of Reversible Circuits and their Quantum Implementations
Author: Nabila Abdessaied, Matthew Amy, Rolf Drechsler, Mathias Soeken
Journal: Theoretical Computer Science
Details: DOI: 10.1016/j.tcs.2016.01.011, Volume 618, pp. 85–106
Year: 2016

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Analyzing Inconsistencies in UML/OCL Models
Author: Nils Przigoda, Robert Wille, Rolf Drechsler
Journal: Journal of Circuits, Systems and Computers
Details: DOI: 10.1142/S0218126616400211, Volume 25, Issue 03
Year: 2016

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KI-Unterstützung im Systementwurf – Wenn Computer lernen, wie Computer arbeiten
Author: Jannis Stoppe, Rolf Drechsler
Journal: Industrie 4.0 Management
Details: 1/2015, Nr. 5104
Year: 2015

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Atomic distributions in crystal structures solved by Boolean satisfiability techniques
Author: Mathias Soeken, Rolf Drechsler, Reinhard X. Fischer
Journal: Zeitschrift für Kristallographie - Crystalline Materials
Details: DOI: 10.1515/zkri-2015-1887, Z. Kristallogr. 2016; 231(2): 107–111
Year: 2015

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SyReC: A Hardware Description Language for the Specification and Synthesis of Reversible Circuits
Author: Robert Wille, Eleonora Schonborn, Mathias Soeken, Rolf Drechsler
Journal: INTEGRATION, the VLSI Journal
Details: DOI: 10.1016/j.vlsi.2015.10.001, 53(3):39-53
Year: 2016

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Analyzing SystemC Designs: SystemC Analysis Approaches for Varying Applications
Author: Jannis Stoppe, Rolf Drechsler
Journal: Sensors
Details: DOI: 10.3390/s150510399, Volume (issue) 15(5), pages 10399-10421
Year: 2015

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Transaction-based online debug for NoC-based multiprocessor SoCs
Author: Mehdi Dehbashi, Görschwin Fey
Journal: Microprocessors and Microsystems (MICPRO)
Details: DOI: 10.1016/j.micpro.2015.03.003, 39(3): 157-166
Year: 2015

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Scalable One-Pass Synthesis for Digital Microfluidic Biochips
Author: Robert Wille, Oliver Keszöcze, Tobias Boehnisch, Alexander Kroker, Rolf Drechsler
Journal: IEEE Design & Test of Computers
Details: DOI: 10.1109/MDAT.2015.2455344, Volume 32, Issue 66, Pages 41—50
Year: 2015

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QMDDs: Efficient Quantum Function Representation and Manipulation
Author: Philipp Niemann, Robert Wille, D. Michael Miller, Mitchell A. Thornton, Rolf Drechsler
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2015.2459034, Volume 35, Number 1, pp. 86-99
Year: 2016

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Embedding of Large Boolean Functions for Reversible Logic
Author: Mathias Soeken, Robert Wille, Oliver Keszöcze, D. Michael Miller, Rolf Drechsler
Journal: Journal on Emerging Technologies in Computing Systems (JETC)
Details: DOI 10.48550/arXiv.1408.3586, Volume 12, Issue 4
Year: 2015

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Ancilla-free synthesis of large reversible functions using binary decision diagrams
Author: Mathias Soeken, Laura Tague, Gerhard W. Dueck, Rolf Drechsler
Journal: Journal of Symbolic Computation
Details: DOI 10.48550/arXiv.1408.3955
Year: 2015

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Benefits of illustrations and videos for technical documentations
Author: Cornelia Große, Lisa Jungmann, Rolf Drechsler
Journal: Computers in Human Behavior
Details: DOI 10.1016/j.chb.2014.11.095, Volume 45, Pages 109–120
Year: 2015

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Incorporating User Preferences in Many-Objective Optimization using Relation epsilon-Preferred
Author: Nicole Drechsler, André Sülflow, Rolf Drechsler
Journal: Natural Computing
Details: DOI: 10.1007/s11047-014-9422-0, Volume 14, Issue 3, pp 469-483
Year: 2015

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Exact Reordering of Circuit Lines for Nearest Neighbor Quantum Architectures
Author: Robert Wille, Aaron Lye, Rolf Drechsler
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2014.2356463, Volume 33, Number 12, pp. 1818-1831
Year: 2014

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Improved Cube List Based Cube Pairing Approach for Synthesis of ESOP Based Reversible Logic
Author: Chandan Bandyopadhyay, Hafizur Rahaman, Rolf Drechsler
Journal: Transactions on Computational Science
Details: XXIV, pp 129–146, DOI: 10.1007/978-3-662-45711-5_8
Year: 2014

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An Approach to Reversible Logic Synthesis Using Input and Output Permutations
Author: Kamalika Datta, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler
Journal: Transactions on Computational Science
Details: XXIV, pp 92-110, DOI: 10.1007/978-3-662-45711-5_6
Year: 2014

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A Simulation Based Approach for Automated Feature Localization
Author: Jan Malburg, Alexander Finder, Görschwin Fey
Journal: IEEE Trans. on CAD of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2014.2360462, Volume:33, Issue: 12, pp. 1886-1899
Year: 2014

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Dynamic X-filling for Peak Capture Power Reduction for Compact Test Sets
Author: Stephan Eggersglüß
Journal: Journal of Electronic Testing: Theory and Applications
Details: DOI: 10.1007/s10836-014-5472-6, Volume 30, Number 5, pp. 557-567
Year: 2014

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Latency Analysis for Sequential Circuits
Author: Alexander Finder, André Sülflow, Görschwin Fey
Journal: IEEE Trans. on CAD of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2013.2292501, Volume 33, Number 4, pp. 643-647
Year: 2014

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Special Issue on Reversible Computation
Author: Robert Wille, Rolf Drechsler, Mehdi . B. Tahoori (editors)
Journal: Journal on Emerging Technologies in Computing Systems (JETC)
Details: DOI: 10.1145/2663349, Volume 11, Number 2
Year: 2014

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An effective fault ordering heuristic for SAT-based dynamic test compaction techniques
Author: Stephan Eggersglüß, Rolf Drechsler
Journal: it-Information Technology
Details: DOI: 10.1515/itit-2013-1041, Volume 56, Number 4, pp. 157-164
Year: 2014

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Testing integrated circuits
Author: Rolf Drechsler
Journal: it-Information Technology
Details: DOI: 10.1515/itit-2014-1043, Volume 56, Number 4, pp. 148-149
Year: 2014

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Finite controlled invariants for sampled switched systems
Author: Laurent Fribourg, Ulrich Kühne, Romain Soulat
Journal: Formal Methods in System Design
Details: DOI: 10.1007/s10703-014-0211-2
Year: 2014

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Learning to solve story problems – supporting transitions between reality and mathematics
Author: Cornelia Große
Journal: European Journal of Psychology of Education
Details: DOI: 10.1007/s10212-014-0217-6, Volume 29, Number 4, pp. 619-634
Year: 2014

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Mathematics learning with multiple solution methods: effects of types of solutions and learners’ activity
Author: Cornelia Große
Journal: Instructional Science
Details: DOI: 10.1007/s11251-014-9312-y, Volume 42, Number 5, pp 715-745
Year: 2014

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Upper bounds for reversible circuits based on Young subgroups
Author: Nabila Abdessaied, Mathias Soeken, Michael Kirkedal Thomsen, Rolf Drechsler
Journal: Information Processing Letters
Details: DOI: 10.1016/j.ipl.2014.01.003, Volume 114, Number 06, pp. 282-286
Year: 2014

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Search-based testing using constraint-based mutation
Author: Jan Malburg, Gordon Fraser
Journal: Software Testing, Verification and Reliability
Details: DOI 10.1002/stvr.1508, Volume 24, Issue 6, pp. 472–495
Year: 2013

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Formale Verifikation von UML-basierten Spezifikationen, Prüfung der Korrektheit von Systementwürfen vor deren Implementierung
Author: Mathias Soeken, Robert Wille, Rolf Drechsler
Journal: In Industrie Management 1/2013
Details: pp.44-48, 2013
Year: 2013

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Considering Nearest Neighbor Constraints of Quantum Circuits at the Reversible Circuit Level
Author: Robert Wille, Aaron Lye, Rolf Drechsler
Journal: Quantum Information Processing
Details: DOI: 10.1007/s11128-013-0642-5
Year: 2013

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Quantum circuits employing roots of the Pauli matrices
Author: Mathias Soeken, D. Michael Miller, Rolf Drechsler
Journal: Physical Review A
Details: DOI: 10.1103/PhysRevA.88.042322, Volume 88
Year: 2013

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Trading Off Circuit Lines and Gate Costs in the Synthesis of Reversible Logic
Author: Robert Wille, Mathias Soeken, D. Michael Miller, Rolf Drechsler
Journal: INTEGRATION, the VLSI Journal
Details: DOI: 10.1016/j.vlsi.2013.08.002, Volume 47, Number 2, pp. 284-294
Year: 2014

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Speci fication-Driven Model Transformation Testing
Author: Esther Guerra, Mathias Soeken
Journal: Software and Systems Modeling
Details: DOI 10.1007/s10270-013-0369-x
Year: 2013

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A Formal Model for Embedded Brain Reading
Author: Elsa Andrea Kirchner, Rolf Drechsler
Journal: Industrial Robot: an International Journal
Details: DOI 10.1108/IR-01-2013-318, Volume 40, Issue 6, pp. 530-540
Year: 2013

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High Efficiency Time Redundant Hardened Latch for Reliable Circuit Design
Author: Rahebeh Niaraki Asli, Saeideh Shirinzadeh
Journal: Journal of Electronic Testing
Details: DOI: 10.1007/s10836-013-5384-x, Volume 29, Issue 4, pp 537-544
Year: 2013

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Debug Automation for Logic Circuits Under Timing Variations
Author: Mehdi Dehbashi, Görschwin Fey
Journal: IEEE Design & Test of Computers
Details: DOI 10.1109/MDAT.2013.2266393, Volume 30, Issue 6, pp. 60-69
Year: 2013

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Effect of Negative Control Lines on the Exact Synthesis of Reversible Circuits
Author: Robert Wille, Mathias Soeken, Nils Przigoda, Rolf Drechsler
Journal: Multiple-Valued Logic and Soft Computing
Details: Volume 21, Number 5-6, 2013, pp. 627-640
Year: 2013

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Parametric Verification and Test Coverage for Hybrid Automata using the Inverse Method
Author: Laurent Fribourg, Ulrich Kühne
Journal: International Journal of Foundations of Computer Science (IJFCS)
Details: DOI 10.1007/978-3-642-24288-5_17, Volume 24, Number 02, pp. 233-250
Year: 2013

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RevKit: An Open Source Toolkit for the Design of Reversible Circuits
Author: Mathias Soeken, Stefan Frehse, Robert Wille, Rolf Drechsler
Journal: Reversible Computation 2011 (Series: Lecture Notes in Computer Science)
Details: DOI: 10.1007/978-3-642-29517-1_6, Volume 7165, 3rd Int. Workshop, RC 2011, Revised Papers, pp. 64-76
Year: 2012

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Automated Design Debugging in a Testbench-Based Verification Environment
Author: Mehdi Dehbashi, André Sülflow, Görschwin Fey
Journal: Embedded Hardware Design - Microprocessors and Microsystems (MICPRO)
Details: DOI 10.1109/DSD.2011.67, Volume 37, Issue 2, pp. 206-217
Year: 2013

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Enhanced Formal Verification Flow for Circuits Integrating Debugging and Coverage Analysis
Author: Daniel Große, Görschwin Fey, Rolf Drechsler
Journal: Electronic Communications of the EASST
Details: DOI 10.14279/tuj.eceasst.62.860, Volume 62, pp. 13
Year: 2013

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Automatic TLM Fault Localization for SystemC
Author: Hoang M. Le, Daniel Große, Rolf Drechsler
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2012.2188800 , Volume 31, Number 8, pp. 1249-1262
Year: 2012

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Special Issue on Reversible Computation
Author: Rolf Drechsler, Irek Ulidowski, Robert Wille (editors)
Journal: Multiple-Valued Logic and Soft Computing
Details: Volume 18, Number 1
Year: 2012

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RevKit: A Toolkit for Reversible Circuit Design
Author: Mathias Soeken, Stefan Frehse, Robert Wille, Rolf Drechsler
Journal: Multiple-Valued Logic and Soft Computing
Details: Volume 18, Number 1, pp. 55-65
Year: 2012

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A Highly Fault-Efficient SAT-Based ATPG Flow
Author: Stephan Eggersglüß, Rolf Drechsler
Journal: IEEE Design & Test of Computers
Details: DOI: 10.1109/MDT.2012.2205479, Volume 29, Issue 4, pp. 63-70
Year: 2012

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Efficient Data Structures and Methodologies for SAT-based ATPG providing High Fault Coverage in Industrial Application
Author: Stephan Eggersglüß, Rolf Drechsler
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2011.2152450, Volume 30, Number 9, pp. 1411-1415
Year: 2011

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Effective Robustness Analysis using Bounded Model Checking Techniques
Author: Görschwin Fey, André Sülflow, Stefan Frehse, Rolf Drechsler
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2011.2120950, Volume 30, Number 8, pp. 1239-1252
Year: 2011

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Synthesis of Quantum Circuits for Linear Nearest Neighbor Architectures
Author: Mehdi Saeedi, Robert Wille, Rolf Drechsler
Journal: Quantum Information Processing
Details: DOI :10.1007/s11128-010-0201-2, Volume 10, Number 3, pp. 355-377
Year: 2011

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Debugging Reversible Circuits
Author: Robert Wille, Daniel Große, Stefan Frehse, Gerhard W. Dueck, Rolf Drechsler
Journal: INTEGRATION, the VLSI Journal
Details: DOI: 10.1016/j.vlsi.2010.08.002, Volume 44, Number 1, pp. 51-61, January
Year: 2011

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BDD-Based Synthesis of Reversible Logic
Author: Robert Wille, Rolf Drechsler
Journal: International Journal of Applied Metaheuristic Computing (IJAMC)
Details: DOI: 10.1145/1629911.1629984, Volume 1, Number 4, pp. 25-41
Year: 2010

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Automatische formale Verifikation der Fehlertoleranz von Schaltkreisen
Author: Görschwin Fey, Andre Sülflow, Stefan Frehse, Rolf Drechsler
Journal: it-Information Technology
Details: DOI: 10.1524/itit.2010.0594, Volume 52, Number 4, pp. 216-223
Year: 2010

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Towards Fully Automatic Synthesis of Embedded Software
Author: Ulrich Kühne, Daniel Große, Rolf Drechsler
Journal: IEEE Embedded Systems Letters
Details: DOI: 10.1109/LES.2010.2049983, Volume 2, Number 3, pp. 53-57
Year: 2010

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Effect of BDD Optimization on Synthesis of Reversible and Quantum Logic
Author: Robert Wille, Rolf Drechsler
Journal: Electronic Notes in Theoretical Computer Science
Details: DOI: 10.1016/j.entcs.2010.02.006, Volume 253, Number 6, pp. 57-70
Year: 2010

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Incremental Solving Techniques for SAT-based ATPG
Author: Daniel Tille, Stephan Eggersglüß, Rolf Drechsler
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2010.2044673, Volume 29, Number 7, pp. 1125-1130
Year: 2010

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Synthese reversibler Logik
Author: Robert Wille, Rolf Drechsler
Journal: it-Information Technology
Details: DOI: 10.1524/itit.2010.0568,Volume 52, Number 1, pp. 30-38
Year: 2010

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MONSOON: SAT-based ATPG for Path Delay Faults Using Multiple-Valued Logics
Author: Stephan Eggersglüß, Görschwin Fey, Andreas Glowatz, Friedrich Hapke, Juergen Schloeffel, Rolf Drechsler
Journal: Journal of Electronic Testing: Theory and Applications
Details: DOI: 10.1007/s10836-010-5146-y,Volume 26, Number 3, pp. 307-322, Pdf download
Year: 2010

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Overcoming the limitations of data introspection for SystemC
Author: Christian Genz, Rolf Drechsler
Journal: EDA Tech Forum
Details: DOI: 10.1109/DATE.2009.5090734, Volume 6, Issue 5, pp. 30-34
Year: 2009

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Formale Verifikation von logistischen Prozessmodellen
Author: B. Scholz-Reiter, M. Lütjen, C. Ruthenbeck, F. Harjes, Rolf Drechsler
Journal: ERP Management
Details: Volume 5, pp.44-47
Year: 2009

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Weighted A* search - unifying view and application
Author: Rüdiger Ebendt, Rolf Drechsler
Journal: Artificial Intelligence
Details: DOI: 10.1016/j.artint.2009.06.004, Volume 173, Issue 15, pp. 1367-1456
Year: 2009

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Effiziente Erfüllbarkeitsalgorithmen für die Generierung von Testmustern
Author: Rolf Drechsler, Stephan Eggersglüß, Görschwin Fey, Jürgen Schlöffel, Daniel Tille
Journal: it - information technology
Details: DOI: 10.1524/itit.2009.0529, Volume 51, Number 2, pp. 102-111, Pdf download
Year: 2009

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Exact Synthesis of Elementary Quantum Gate Circuits
Author: Daniel Große, Robert Wille, Gerhard W. Dueck, Rolf Drechsler
Journal: Multiple-Valued Logic and Soft Computing
Details: DOI: 10.1109/ISMVL.2008.42, Volume 15, Number 4, pp. 283-300
Year: 2009

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Advanced Verification by Automatic Property Generation
Author: Frank Rogin, Thomas Klotz, Görschwin Fey, Rolf Drechsler, Steffen Rülke
Journal: IET Computers & Digital Techniques
Details: DOI: 10.1049/iet-cdt.2008.0110, Volume 3, Issue 4, pp. 338-353
Year: 2009

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Exact Multiple Control Toffoli Network Synthesis with SAT Techniques
Author: Daniel Große, Robert Wille, Gerhard W. Dueck, Rolf Drechsler
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2009.2017215, Volume 28, Number 5, pp. 703-715
Year: 2009

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Modeling and Proving Completeness in Formal Verification of Counting Heads
Author: Sebastian Kinder, Rolf Drechsler
Journal: Software Tools for Technology Transfer (STTT)
Details: DOI: 10.1007/s10009-008-0084-z, Springer, Volume 10, Number 6, pp. 521 - 534
Year: 2008

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On Acceleration of SAT-based ATPG for Industrial Designs
Author: Rolf Drechsler, Stephan Eggersglüß, Görschwin Fey, Andreas Glowatz, Friedrich Hapke, Juergen Schloeffel, Daniel Tille
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2008.923107, Volume 27, Number 7, pp. 1329-1333
Year: 2008

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Improved SAT-based Reachability Analysis with Observability Don’t Cares
Author: Sean Safarpour, Andreas Veneris and Rolf Drechsler
Journal: Journal on Satisfiability, Boolean Modeling and Computation (JSAT)
Details: DOI: 10.3233/SAT190050, Volume 5, pp. 1-25, Special Volume on Application of Constraints to Formal Verification
Year: 2008

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On the Construction of Small Fully Testable Circuits with Low Depth
Author: Görschwin Fey, Anna Bernasconi, Valentina Ciriani, Rolf Drechsler
Journal: Embedded Hardware Design - Microprocessors and Microsystems (MICPRO)
Details: DOI: 10.1016/j.micpro.2008.03.005, Special Issue, Volume 32, Issues 5-6, pp. 263-269
Year: 2008

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Logic Minimization and Testability of 2-SPP Networks
Author: Anna Bernasconi, Valentina Ciriani, Rolf Drechsler, Tiziano Villa
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2008.923072, Volume 27, Number 7, pp. 1190-1202
Year: 2008

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Analyzing Functional Coverage in Bounded Model Checking
Author: Daniel Große, Ulrich Kühne, Rolf Drechsler
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2008.925790, Volume 27, Number 7, pp. 1305-1314
Year: 2008

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Automatic Fault Localization for Property Checking
Author: Görschwin Fey, Stefan Staber, Roderick Bloem, Rolf Drechsler
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2008.923234, Volume 27, Number 6, pp. 1138-1149, June
Year: 2008

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BDD-based Verification of Scalable Designs
Author: Daniel Große, Rolf Drechsler
Journal: Facta Universitatis, Series: Electronics and Energetics
Details: DOI: 10.2298/FUEE0703367G, Volume 20, Number 3, pp. 367-379
Year: 2007

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Building Free Binary Decision Diagrams Using SAT Solvers
Author: Robert Wille, Görschwin Fey, Rolf Drechsler
Journal: Facta Universitatis, Series: Electronics and Energetics
Details: DOI: 10.2298/FUEE0703381W, Volume 20, Number 3, pp. 381-394,
Year: 2007

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An Integrated Approach for Combining BDDs and SAT Provers
Author: Rolf Drechsler, Görschwin Fey, Sebastian Kinder
Journal: Facta Universitatis, Series: Electronics and Energetics
Details: DOI: 10.2298/FUEE0703415D, Volume 20, Number 3, pp. 415-436
Year: 2007

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Simultaneous On-Chip Bus Synthesis and Voltage Scaling Under Random On-Chip Data Traffic
Author: Sujan Pandey, Manfred Glesner
Journal: IEEE Transaction on Very Large Scale Integration (VLSI) Systems
Details: DOI: 10.1109/TVLSI.2007.903924Volume 15, Number 10, pp. 1111-1124
Year: 2007

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Technische Dokumentation von Soft- und Hardware in eingebetteten Systemen
Author: Beate Muranko, Rolf Drechsler
Journal: it - information technology
Details: DOI: 10.1524/itit.2007.49.2.110, Number 2, pp. 110-117, Pdf download
Year: 2007

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Exact minimisation of path-related objective functions for binary decision diagrams
Author: Rüdiger Ebendt, Rolf Drechsler
Journal: IEE Proceedings Computer & Digital Techniques
Details: DOI: 10.1049/ip-cdt:20050181, Volume 153, Number 4, pp. 231-242
Year: 2006

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Testability of SPP Three-Level Logic Networks in Static Fault Models
Author: Valentina Ciriani, Anna Bernasconi, Rolf Drechsler
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2005.862746, Volume 25, Number 10, pp. 2241-2248
Year: 2006

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The Effect of Improved Lower Bounds in Dynamic BDD Reordering
Author: Rüdiger Ebendt, Rolf Drechsler
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2005.854632, Volume 25, Number 5, pp. 902-909
Year: 2006

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Minimizing the Number of Paths in BDDs - Theory and Algorithm
Author: Görschwin Fey, Rolf Drechsler
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2005.852662, Volume 25, Number 1, pp. 4-11
Year: 2006

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Combining Ordered Best-First Search with Branch and Bound for Exact BDD Minimization
Author: Rüdiger Ebendt, Wolfgang Günther, Rolf Drechsler
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2005.852053, Volume 24, Number 10, pp. 1515-1529
Year: 2005

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System Level Validation Using Formal Techniques
Author: Rolf Drechsler, Daniel Große
Journal: IEE Proceedings Computer & Digital Techniques, Special Issue on Embedded Microelectronic Systems: Status and Trends
Details: DOI: 10.1049/ip-cdt:20045073, Volume 152, Number 3, pp. 393-406
Year: 2005

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Generic Implementation of Multi-Valued Decision Diagram Packages
Author: Rolf Drechsler, Dragan Jankovic, Radomir Stankovic
Journal: Multiple-Valued Logic and Soft Computing
Details: Volume 11, Numbers 1-2, pp. 1-18
Year: 2005

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Project-Based Learning in Student Teams in Computer Science Education
Author: Andreas Breiter, Görschwin Fey, Rolf Drechsler
Journal: Facta Universitatis, Series: Electronics and Energetics
Details: DOI: 10.2298/FUEE0502165B, Volume 18, Number 2, pp. 165-180
Year: 2005

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Synthesis of Fully Testable Circuits from BDDs
Author: Rolf Drechsler, Junhao Shi, Görschwin Fey
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2004.823342, Volume 23, Number 3
Year: 2004

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Methods for Construction of Recursive Algorithms for Reed-Mulle-Fourier Polarity Matrices Calculation
Author: Dragan Jankovic, Rolf Drechsler
Journal: Multiple-Valued Logic and Soft Computing
Details: Volume 10, Numbers 1, pp. 29-50
Year: 2004

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Using Word-Level Information in Formal Hardware Verification
Author: Rolf Drechsler
Journal: Automation and Remote Control
Details: DOI: 10.1023/B:AURC.0000030907.28679.82, Volume 65, Issue 6, pp. 963-977
Year: 2004

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An Improved Branch and Bound Algorithm for Exact BDD Minimization
Author: Rüdiger Ebendt, Wolfgang Günther, Rolf Drechsler
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2003.819427, Volume 22, Number 12, pp. 1657-1663
Year: 2003

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Recursive Bi-Partitioning of Netlists for Large Number of Partitions
Author: Rolf Drechsler, Wolfgang Günther, Thomas Eschbach, Lothar Linhard, Gerhard Angst
Journal: Journal of Systems Architecture - the Euromicro Journal
Details: DOI: 10.1109/DSD.2002.1115349, Volume 49, pp. 521-528
Year: 2003

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Ein Ansatz zur formalen Verifikation von Schaltungsbeschreibungen in SystemC
Author: Daniel Große, Rolf Drechsler
Journal: it - information technology
Details: DOI: 10.1524/itit.45.4.219.22731, Number 4, pp. 219-226
Year: 2003

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Efficient Minimization and Manipulation of Linearly Transformed Binary Decision Diagrams
Author: Wolfgang Günther, Rolf Drechsler
Journal: IEEE Transactions on Computers
Details: DOI: 10.1109/TC.2003.1228514, Volume 52, Number 9, pp. 1196-1209
Year: 2003

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Exact Routing with Search Space Reduction
Author: Frank Schmiedle, Rolf Drechsler, Bernd Becker
Journal: IEEE Transactions on Computers
Details: DOI: 10.1109/TC.2003.1204836, Volume 52, Number 6, pp. 815-825
Year: 2003

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Computer Architecture Core of Knowledge for Computer Science Studies
Author: M. Stojcev, I. Milentijevic, D. Kehagias, Rolf Drechsler, M. Gusev
Journal: Cyprus Computer Society Journal
Details: Volume I, Edition 4, April
Year: 2003

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Polynomial Formal Verification of Multipliers
Author: Martin Keim, Rolf Drechsler, Bernd Becker, Michael Martin, Paul Molitor
Journal: Formal Methods in System Design: An International Journal
Details: DOI: 10.1023/A:1021752130394, Volume 22, Issue 1, pp. 39-58
Year: 2003

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Low Power Optimization Techniques for BDD Mapped Circuits Using Temporal Correlation
Author: Rolf Drechsler, Mikael Kerttu, Per Lindgren, Mitch Thornton
Journal: Canadian Journal of Electrical and Computer Engineering
Details: Volume 27, Number 4, pp. 159-164, October
Year: 2002

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Efficient Algorithms for Creation of Linearly-independent Decision Diagrams and their Mapping to Regular Layouts
Author: M. Perkowski, B. Falkowski, M. Chrzanowska-Jeske, Rolf Drechsler
Journal: In VLSI Design — An International Journal of Custom-Chip Design, Simulation, and Testing, Special Issue on Spectral Techniques and Decision Diagrams
Details: Volume 14, Number 1, pp. 35-52, February 2002
Year: 2002

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Logic Circuit Equivalence Checking Using Haar Spectral Coefficients and Partial BDDs
Author: M. A. Thornton, Rolf Drechsler, W. Günther
Journal: VLSI Design
Details: DOI: 10.1080/10655140290009800, Volume 14, Article ID 290173
Year: 2002

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Minimization of Word-level Decision Diagrams
Author: Rolf Drechsler, Wolfgang Günther, Stefan Höreth.
Journal: INTEGRATION, the VLSI Journal
Details: DOI: 10.1016/S0167-9260(02)00047-0, Volume 33, Issue 1-2, pp. 39-70
Year: 2002

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Minimization of Free BDDs
Author: Wolfgang Günther, Rolf Drechsler
Journal: INTEGRATION, the VLSI Journal
Details: DOI: 10.1109/ASPDAC.1999.760024, Volume 32, Issue 1-2, pp. 41-59
Year: 2002

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Verifying Integrity of Decision Diagrams
Author: Rolf Drechsler
Journal: INTEGRATION, the VLSI Journal
Details: DOI: 10.1016/S0167-9260(02)00042-1, Volume 32, Issue 1-2, pp. 61-75
Year: 2002

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Heuristic Learning based on Genetic Programming
Author: Frank Schmiedle, Nicole Drechsler, Daniel Große and Rolf Drechsler
Journal: Genetic Programming and Evolvable Machines
Details: DOI: 10.1023/A:1020988925923, Volume 3, pp. 363-388
Year: 2002

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Dynamic Re-Encoding During MDD Minimization
Author: Frank Schmiedle, Wolfgang Günther, Rolf Drechsler
Journal: Multiple-Valued Logic - An International Journal
Details: Volume 8, Numbers 5-6, pp. 625-643
Year: 2002

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History-based Dynamic BDD Minimization
Author: Rolf Drechsler, Wolfgang Günther
Journal: INTEGRATION, the VLSI Journal
Details: DOI: 10.1016/S0167-9260(01)00021-9, Volume 31, Issue 1, pp. 51-63
Year: 2001

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Äquivalenzvergleich digitaler Schaltungen im industriellen Umfeld
Author: Rolf Drechsler
Journal: it+ti - Informationstechnik und Technische Informatik
Details: DOI: 10.1524/itit.2001.43.4.200, Oldenbourg Wissenschaftsverlag, Number 4, pp. 200-205
Year: 2001

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Fault Simulation in Multi-Valued Logic Networks
Author: Rolf Drechsler, Martin Keim, Bernd Becker
Journal: Multiple-Valued Logic - An International Journal
Details: Volume 7, Numbers 1-2, pp. 25-47
Year: 2001

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Binary Decision Diagrams in Theory and Practice
Author: Rolf Drechsler, Detlef Sieling
Journal: Software Tools for Technology Transfer (STTT)
Details: DOI: 10.1007/s100090100056, Springer, Number 3, pp. 112-136
Year: 2001

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Combining GAs and Symbolic Methods for High Quality Tests of Sequential Circuits
Author: Martin Keim, Nicole Drechsler, Rolf Drechsler, Bernd Becker
Journal: Journal of Electronic Testing, Theory and Application (JETTA)
Details: DOI: 10.1023/A:1011193725824, No. 17, pp. 37-51
Year: 2001

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Decision Diagram Method for Calculation of Pruned Walsh Transform
Author: Dragan Jankovic, Radomir Stankovic, Rolf Drechsler
Journal: IEEE Transactions on Computers
Details: DOI: 10.1109/12.908990, Volume 50, Number 2, pp. 147-157
Year: 2001

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Using Lower Bounds during Dynamic BDD Minimization
Author: Rolf Drechsler, Wolfgang Günther, Fabio Somenzi
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/43.905674, Volume 20, Number 1, pp. 51-57
Year: 2001

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ACTion: Combining Logic Synthesis and Technology Mapping for MUX based FPGAs
Author: Wolfgang Günther and Rolf Drechsler.
Journal: Journal of Systems Architecture - the Euromicro Journal
Details: DOI: 10.1016/S1383-7621(00)00027-8, Volume 46, Issue 14, pp. 1321-1334, December
Year: 2000

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EXOR transform of inputs to design efficient two-level AND/EXOR adders
Author: Rolf Drechsler, Bernd Becker
Journal: Electronics Letters
Details: DOI: 10.1049/el:20000214, Stevenage Bd. 36, Ausg. 3, (Feb 3, 2000): 1-2
Year: 2000

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Boolean Function Representation and Spectral Characterization Using AND/OR Graphs
Author: Alenka Zuzek, Rolf Drechsler, Mitch Thornton
Journal: INTEGRATION, the VLSI Journal
Details: DOI: 10.1016/S0167-9260(00)00003-1, Volume 29, Issue 2, pp. 101-116, September
Year: 2000

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Genetic Algorithm for Minimization of fixed polarity Reed-Muller expressions
Author: Rolf Drechsler, Bernd Becker and Nicole Drechsler
Journal: IEE Proceedings Computers and Digital Techniques
Details: DOI: 10.1049/ip-cdt:20000743, Volume 147, Number 5, September
Year: 2000

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On the Computational Power of Linearly Transformed BDDs
Author: Wolfgang Günther, Rolf Drechsler
Journal: Information Processing Letters
Details: DOI: 10.1016/S0020-0190(00)00083-1, Volume 75, Nummer 3, pp. 119-125, August
Year: 2000

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Fast Exact Minimization of BDDs
Author: Rolf Drechsler, Nicole Drechsler, Wolfgang Günther
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: Volume 19, Number 3, pp. 384-389, March
Year: 2000

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Pseudo Kronecker Expressions for Symmetric Functions
Author: Rolf Drechsler
Journal: IEEE Transactions on Computers
Details: DOI: 10.1109/12.795226, Volume 48, Number 9, pp. 987-990, September
Year: 1999

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ETDD-based synthesis of two-dimensional cellular arrays for multi-output incompletely specified Boolean functions
Author: G. Lee, Rolf Drechsler, M. A. Perkowski
Journal: IEE Proceedings - Computers and Digital Techniques
Details: DOI: 10.1049/ip-cdt:19990798, Volume 146, Issue 6, pp. 302–308
Year: 1999

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OKFDD minimization by genetic algorithms with application to circuit design
Author: Rolf Drechsler, Bernd Becker, Nicole Drechsler
Journal: Integration
Details: DOI: 10.1016/S0167-9260(99)00017-6, Volume 28, Issue 2, pp. 121-139
Year: 1999

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Testability of 2-Level AND/EXOR Circuits
Author: Rolf Drechsler, Harry Hengster, Horst Schäfer, Joachim Hartmann, Bernd Becker
Journal: Journal of Electronic Testing, Theory and Application (JETTA)
Details: DOI: 10.1023/A:1008306002882, Volume 14, Number 3, pp. 173-192, June
Year: 1999

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BDD Minimization Using Symmetries
Author: Christoph Scholl, Dirk Möller, Paul Molitor, Rolf Drechsler
Journal: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/43.743706, Volume 18, Number 2, pp. 81-100, February
Year: 1999

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On Variable Ordering and Decomposition Type Choice in OKFDDs
Author: Rolf Drechsler, Bernd Becker, Andrea Jahnke
Journal: IEEE Transactions on Computers
Details: DOI: 10.1109/12.737685, Volume 47, Number 12, December
Year: 1998



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