

» RevKit: An Open Source Toolkit for the Design of Reversible Circuits
[Link to the homepage of the journal]
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Autor:
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Mathias Soeken, Stefan Frehse, Robert Wille, Rolf Drechsler |
| Journal: |

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Reversible Computation 2011 (Series: Lecture Notes in Computer Science) |
| Details: |

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Volume 7165, Third International Workshop, RC 2011, Revised Papers |
Year:
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2011
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» Automated Design Debugging in a Testbench-Based Verification Environment
[Link to the homepage of the journal]
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Autor:
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Mehdi Dehbashi, André Sülflow, Görschwin Fey |
| Journal: |

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Embedded Hardware Design - Microprocessors and Microsystems (MICPRO) |
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accepted |
Year:
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2012
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» Automatic TLM Fault Localization for SystemC
[Link to the homepage of the journal]
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Autor:
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Hoang M. Le, Daniel Große, Rolf Drechsler |
| Journal: |

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IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems |
| Details: |

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accepted |
Year:
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2012
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» Special Issue on Reversible Computation
[Link to the homepage of the journal]
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Autor:
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Rolf Drechsler, Irek Ulidowski, Robert Wille (editors) |
| Journal: |

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Multiple-Valued Logic and Soft Computing |
| Details: |

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Volume 18, Number 1 |
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2012
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» RevKit: A Toolkit for Reversible Circuit Design
[Link to the homepage of the journal]
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Autor:
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Mathias Soeken, Stefan Frehse, Robert Wille, Rolf Drechsler |
| Journal: |

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Multiple-Valued Logic and Soft Computing |
| Details: |

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Volume 18, Number 1, pp. 55-65 |
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2012
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» A highly fault-efficient SAT-based ATPG flow
[Link to the homepage of the journal]
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Autor:
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Stephan Eggersglüß, Rolf Drechsler |
| Journal: |

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IEEE Design & Test of Computers |
| Details: |

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accepted
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Year:
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2011
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» Efficient Data Structures and Methodologies for SAT-based ATPG providing High Fault Coverage in Industrial Application
[Link to the homepage of the journal]
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Autor:
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Stephan Eggersglüß, Rolf Drechsler |
| Journal: |

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IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems |
| Details: |

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Volume 30, Number 9, pp. 1411-1415,
DOI: 10.1109/TCAD.2011.2152450 |
Year:
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2011
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» Effective Robustness Analysis using Bounded Model Checking Techniques
[Link to the homepage of the journal]
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Autor:
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Görschwin Fey, André Sülflow, Stefan Frehse, Rolf Drechsler |
| Journal: |

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IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems |
| Details: |

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Volume 30, Number 8, pp. 1239-1252
DOI: 10.1109/TCAD.2011.2120950 |
Year:
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2011
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» Synthesis of Quantum Circuits for Linear Nearest Neighbor Architectures
[Link to the homepage of the journal]
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Autor:
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Mehdi Saeedi, Robert Wille, Rolf Drechsler |
| Journal: |

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Quantum Information Processing |
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Volume 10, Number 3, pp. 355-377DOI: 10.1007/s11128-010-0201-2 |
Year:
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2011
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» Debugging Reversible Circuits
[Link to the homepage of the journal]
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Autor:
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Robert Wille, Daniel Große, Stefan Frehse, Gerhard W. Dueck, Rolf Drechsler |
| Journal: |

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INTEGRATION, the VLSI Journal |
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Volume 44, Number 1, pp. 51-61, JanuaryDOI: 10.1016/j.vlsi.2010.08.002 |
Year:
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2011
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» BDD-Based Synthesis of Reversible Logic
[Link to the homepage of the journal]
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Autor:
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Robert Wille, Rolf Drechsler |
| Journal: |

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International Journal of Applied Metaheuristic Computing (IJAMC) |
| Details: |

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Volume 1, Number 4, pp. 25-41 |
Year:
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2010
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» Automatische formale Verifikation der Fehlertoleranz von Schaltkreisen
[Link to the homepage of the journal]
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Autor:
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Görschwin Fey, Andre Sülflow, Stefan Frehse, Rolf Drechsler |
| Journal: |

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it-Information Technology |
| Details: |

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Volume 52, Number 4, pp. 216-223
PDF Download |
Year:
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2010
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» Towards Fully Automatic Synthesis of Embedded Software
[Link to the homepage of the journal]
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Autor:
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Ulrich Kühne, Daniel Große, Rolf Drechsler |
| Journal: |

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IEEE Embedded Systems Letters |
| Details: |

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Volume 2, Number 3, pp. 53-57, September |
Year:
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2010
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» Effect of BDD Optimization on Synthesis of Reversible and Quantum Logic
[Link to the homepage of the journal]
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Autor:
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Robert Wille, Rolf Drechsler |
| Journal: |

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Electronic Notes in Theoretical Computer Science |
| Details: |

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Volume 253, Number 6, pp. 57-70DOI: 10.1016/j.entcs.2010.02.006 |
Year:
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2010
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» Incremental Solving Techniques for SAT-based ATPG
[Link to the homepage of the journal]
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Autor:
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Daniel Tille, Stephan Eggersglüß, Rolf Drechsler |
| Journal: |

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IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems |
| Details: |

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Volume 29, Number 7, pp. 1125-1130, July |
Year:
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2010
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» Synthese reversibler Logik
[Link to the homepage of the journal]
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Autor:
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Robert Wille, Rolf Drechsler |
| Journal: |

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it-Information Technology |
| Details: |

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Volume 51, Number 1, pp. 30-38
PDF Download |
Year:
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2010
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» MONSOON: SAT-based ATPG for Path Delay Faults Using Multiple-Valued Logics
[Link to the homepage of the journal]
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Autor:
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Stephan Eggersglüß, Görschwin Fey, Andreas Glowatz, Friedrich Hapke, Juergen Schloeffel, Rolf Drechsler |
| Journal: |

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Journal of Electronic Testing: Theory and Applications |
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Volume 26, Number 3 / June, pp. 307-322
Pdf download (Preliminary Version)
The final publication is available at www.springerlink.com |
Year:
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2010
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» Overcoming the limitations of data introspection for SystemC
[Link to the homepage of the journal]
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Autor:
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Christian Genz, Rolf Drechsler |
| Journal: |

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EDA Tech Forum |
| Details: |

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Volume 6, Issue 5, Pages 30-34 (December 2009) |
Year:
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2009
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» Weighted A* search - unifying view and application
[Link to the homepage of the journal]
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Autor:
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Rüdiger Ebendt, Rolf Drechsler |
| Journal: |

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Artificial Intelligence |
| Details: |

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Volume 173, Issue 15, Pages 1367-1456 (September 2009) |
Year:
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2009
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» Effiziente Erfüllbarkeitsalgorithmen für die Generierung von Testmustern
[Link to the homepage of the journal]
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Autor:
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Rolf Drechsler, Stephan Eggersglüß, Görschwin Fey, Jürgen Schlöffel, Daniel Tille |
| Journal: |

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it - information technology |
| Details: |

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Volume 51, Number 2, pp. 102-111
Pdf download |
Year:
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2009
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