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» RevKit: An Open Source Toolkit for the Design of Reversible Circuits
[Link to the homepage of the journal]







Autor:

Mathias Soeken, Stefan Frehse, Robert Wille, Rolf Drechsler
Journal:
Reversible Computation 2011 (Series: Lecture Notes in Computer Science)
Details:
Volume 7165, Third International Workshop, RC 2011, Revised Papers
Year:


2011






» Automated Design Debugging in a Testbench-Based Verification Environment
[Link to the homepage of the journal]







Autor:

Mehdi Dehbashi, André Sülflow, Görschwin Fey
Journal:
Embedded Hardware Design - Microprocessors and Microsystems (MICPRO)
Details:
accepted
Year:


2012






» Automatic TLM Fault Localization for SystemC
[Link to the homepage of the journal]







Autor:

Hoang M. Le, Daniel Große, Rolf Drechsler
Journal:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
accepted
Year:


2012






» Special Issue on Reversible Computation
[Link to the homepage of the journal]







Autor:

Rolf Drechsler, Irek Ulidowski, Robert Wille (editors)
Journal:
Multiple-Valued Logic and Soft Computing
Details:
Volume 18, Number 1
Year:


2012






» RevKit: A Toolkit for Reversible Circuit Design
[Link to the homepage of the journal]







Autor:

Mathias Soeken, Stefan Frehse, Robert Wille, Rolf Drechsler
Journal:
Multiple-Valued Logic and Soft Computing
Details:
Volume 18, Number 1, pp. 55-65
Year:


2012






» A highly fault-efficient SAT-based ATPG flow
[Link to the homepage of the journal]







Autor:

Stephan Eggersglüß, Rolf Drechsler
Journal:
IEEE Design & Test of Computers
Details:
accepted
Year:


2011






» Efficient Data Structures and Methodologies for SAT-based ATPG providing High Fault Coverage in Industrial Application
[Link to the homepage of the journal]







Autor:

Stephan Eggersglüß, Rolf Drechsler
Journal:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 30, Number 9, pp. 1411-1415,
DOI: 10.1109/TCAD.2011.2152450
Year:


2011






» Effective Robustness Analysis using Bounded Model Checking Techniques
[Link to the homepage of the journal]







Autor:

Görschwin Fey, André Sülflow, Stefan Frehse, Rolf Drechsler
Journal:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 30, Number 8, pp. 1239-1252 DOI: 10.1109/TCAD.2011.2120950
Year:


2011






» Synthesis of Quantum Circuits for Linear Nearest Neighbor Architectures
[Link to the homepage of the journal]







Autor:

Mehdi Saeedi, Robert Wille, Rolf Drechsler
Journal:
Quantum Information Processing
Details:
Volume 10, Number 3, pp. 355-377
DOI: 10.1007/s11128-010-0201-2
Year:


2011






» Debugging Reversible Circuits
[Link to the homepage of the journal]







Autor:

Robert Wille, Daniel Große, Stefan Frehse, Gerhard W. Dueck, Rolf Drechsler
Journal:
INTEGRATION, the VLSI Journal
Details:
Volume 44, Number 1, pp. 51-61, January
DOI: 10.1016/j.vlsi.2010.08.002
Year:


2011






» BDD-Based Synthesis of Reversible Logic
[Link to the homepage of the journal]







Autor:

Robert Wille, Rolf Drechsler
Journal:
International Journal of Applied Metaheuristic Computing (IJAMC)
Details:
Volume 1, Number 4, pp. 25-41
Year:


2010






» Automatische formale Verifikation der Fehlertoleranz von Schaltkreisen
[Link to the homepage of the journal]







Autor:

Görschwin Fey, Andre Sülflow, Stefan Frehse, Rolf Drechsler
Journal:
it-Information Technology
Details:
Volume 52, Number 4, pp. 216-223
PDF Download
Year:


2010






» Towards Fully Automatic Synthesis of Embedded Software
[Link to the homepage of the journal]







Autor:

Ulrich Kühne, Daniel Große, Rolf Drechsler
Journal:
IEEE Embedded Systems Letters
Details:
Volume 2, Number 3, pp. 53-57, September
Year:


2010






» Effect of BDD Optimization on Synthesis of Reversible and Quantum Logic
[Link to the homepage of the journal]







Autor:

Robert Wille, Rolf Drechsler
Journal:
Electronic Notes in Theoretical Computer Science
Details:
Volume 253, Number 6, pp. 57-70
DOI: 10.1016/j.entcs.2010.02.006
Year:


2010






» Incremental Solving Techniques for SAT-based ATPG
[Link to the homepage of the journal]







Autor:

Daniel Tille, Stephan Eggersglüß, Rolf Drechsler
Journal:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 29, Number 7, pp. 1125-1130, July
Year:


2010






» Synthese reversibler Logik
[Link to the homepage of the journal]







Autor:

Robert Wille, Rolf Drechsler
Journal:
it-Information Technology
Details:
Volume 51, Number 1, pp. 30-38
PDF Download
Year:


2010






» MONSOON: SAT-based ATPG for Path Delay Faults Using Multiple-Valued Logics
[Link to the homepage of the journal]







Autor:

Stephan Eggersglüß, Görschwin Fey, Andreas Glowatz, Friedrich Hapke, Juergen Schloeffel, Rolf Drechsler
Journal:
Journal of Electronic Testing: Theory and Applications
Details:
Volume 26, Number 3 / June, pp. 307-322
Pdf download (Preliminary Version)
The final publication is available at www.springerlink.com
Year:


2010






» Overcoming the limitations of data introspection for SystemC
[Link to the homepage of the journal]







Autor:

Christian Genz, Rolf Drechsler
Journal:
EDA Tech Forum
Details:
Volume 6, Issue 5, Pages 30-34 (December 2009)
Year:


2009






» Weighted A* search - unifying view and application
[Link to the homepage of the journal]







Autor:

Rüdiger Ebendt, Rolf Drechsler
Journal:
Artificial Intelligence
Details:
Volume 173, Issue 15, Pages 1367-1456 (September 2009)
Year:


2009






» Effiziente Erfüllbarkeitsalgorithmen für die Generierung von Testmustern
[Link to the homepage of the journal]







Autor:

Rolf Drechsler, Stephan Eggersglüß, Görschwin Fey, Jürgen Schlöffel, Daniel Tille
Journal:
it - information technology
Details:
Volume 51, Number 2, pp. 102-111
Pdf download
Year:


2009








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