Focus of this project is the development of new methods for the generation of high-quality tests. Special attention is paid to the application of formal methods like Boolean Satisfiability (SAT) or Pseudo-Boolean Optimization.
Contact: Prof. Dr. Rolf Drechsler, Dr. Stephan Eggersglüß
Traditional technologies more and more reach their limits. Reversible logic provides an alternative with promising applications e.g. in quantum computation or low-power design. Unfortunately, research in this area still is at the beginning. In the project new methods to synthesize reversible logic are developed. Thereby, the focus is on how to efficiently handle large functions resulting in complex circuits.
Techniques to ensure fault tolerance - or robustness - gain an increasing importance in circuit design. Methods to automatically prove such robustness by using formal methods are investigated in the research project.
Contact: Prof. Dr. Rolf Drechsler, Dr. Görschwin Fey
