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Home « Research « Projects
» SANITAS
Prof. Dr. Rolf Drechsler, Dr. Daniel Große [more information]






The project develops verification methods on a high level of abstraction.


» Quality-driven Synthesis of Large Functions in Reversible Logic
Prof. Dr. Rolf Drechsler [more information]




Traditional technologies more and more reach their limits. Reversible logic provides an alternative with promising applications e.g. in quantum computation or low-power design. Unfortunately, research in this area still is at the beginning. In the project new methods to synthesize reversible logic are developed. Thereby, the focus is on how to efficiently handle large functions resulting in complex circuits.


» Quality-driven design of systems with reconfigurable components
Prof. Dr. Rolf Drechsler



This is a joint project with the OFFIS institute at university of Oldenburg. It addresses new verification problems that are specific to reconfigurable hardware systems.


» Visualization of circuits and systems
Prof. Dr. Rolf Drechsler [more information]




Together with the company Concept Engineering algorithms and technologies for visualization of circuits and systems are developed.


» Efficient SAT Algorithms for the Generation of Test Patterns
Prof. Dr. Rolf Drechsler [more information]




In the project it is studied how SAT algorithms can be used in automatic test pattern generation.


» HERKULES: Hardware Design Techniques for Zero-Fault-Designs
Prof. Dr. Rolf Drechsler [more information]






Detailed description is only available in german.


» Verisoft XT
Prof. Dr. Rolf Drechsler [more information]






Modern Method in formal verification


» Synthesis of reliable quantum circuits
Prof. Dr. Rolf Drechsler [more information]




In the project the synthesis of quantum circuits is improved. Furthermore the reliablity of quantum circuits is ensured by methods known from verification and test.


» Formal Robustness Checking
Prof. Dr. Rolf Drechsler, Dr. Görschwin Fey [more information]




Techniques to ensure fault tolerance - or robustness - gain an increasing importance in circuit design. Methods to automatically prove such robustness by using formal methods are investigated in the research project.




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