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Home « Team « Publications
» Publications of
Eleonora Schönborn
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BOOKS |
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BOOK CONTRIBUTIONS |
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JOURNALS |
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CONFERENCES |
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» Circuit Line Minimization in the HDL-based Synthesis of Reversible Logic
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Author:
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Robert Wille, Mathias Soeken, Eleonora Schönborn, Rolf Drechsler |
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IEEE Computer Society Annual Symposium on VLSI (ISVLSI) |
Reference:
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| pp. 213-218, Amherst, USA, 2012
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| [To the Site of this Conference]
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| [view Pdf]
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» Designing a RISC CPU in Reversible Logic
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Author:
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Robert Wille, Mathias Soeken, Daniel Große, Eleonora Schönborn, Rolf Drechsler |
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41st International Symposium on Multiple-Valued Logic (ISMVL) |
Reference:
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| pp. 170-175, Tuusula, 2011
| Hyperlink:
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| [To the Site of this Conference]
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| [view Pdf]
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WORKSHOPS |
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» Designing a RISC CPU in Reversible Logic
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Author:
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Robert Wille, Mathias Soeken, Daniel Große, Eleonora Schönborn, Rolf Drechsler |
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14. ITG/GMM/GI-Workshop "Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen" |
Reference:
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| pp. 249-258, Oldenburg, 2011
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| [Link to the Workshop]
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