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Home « Team « Publications
» Publications of
Harshad Dhotre
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BOOKS |
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BOOK CONTRIBUTIONS |
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JOURNALS |
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CONFERENCES |
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» Constraint-based Pattern Retargeting for Reducing Localized Power Activity during Testing
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Author:
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Harshad Dhotre, Stephan Eggersglüß, Rolf Drechsler, Mehdi Dehbashi, Ulrike Pfannkuchen |
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21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS) |
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| Budapest, Hungary, 2018
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» Identification of Efficient Clustering Techniques for Test Power Activity on the Layout
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Author:
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Harshad Dhotre, Stephan Eggersglüß, Rolf Drechsler |
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26th IEEE Asian Test Symposium (ATS) |
Reference:
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| Taipei, Taiwan, 2017
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» Machine Learning Based Test Pattern Analysis for
Localizing Critical Power Activity Areas
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Author:
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Harshad Dhotre, Stephan Eggersglüß, Mehdi Dehbashi, Ulrike Pfannkuchen, Rolf Drechsler |
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30th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) |
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| Cambridge, UK, 2017
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| [view Pdf]
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WORKSHOPS |
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» ATPG Constraint Analysis for Reducing Regional Power Activity
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Author:
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Harshad Dhotre, Stephan Eggersglüß, Rolf Drechsler, Mehdi Dehbashi, Ulrike Pfannkuchen |
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30. GI/GMM/ITG Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2018) |
Reference:
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| Freiburg (Breisgau), Germany, 2018
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» A Lightweight Method for Transient Test Power Pattern Analysis for Pattern Selection
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Author:
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Harshad Dhotre, Stephan Eggersglüß |
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29. GI/GMM/ITG Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2017) |
Reference:
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| Lübeck, Germany, 2017
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