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BOOKS


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JOURNALS


CONFERENCES



» Identifying a Subset of System Verilog Assertions for Efficient Bounded Model Checking




Author:

Robert Wille, Görschwin Fey, Marc Messing, Gerhard Angst, Lothar Linhard, Rolf Drechsler
Conference:
Euromicro Conference on Digital System Design (DSD)
Reference:

pp. 542-549, Parma, 2008
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]


WORKSHOPS




» Using a Two-Dimensional Fault List for Compact Automatic Test Pattern Generation




Author:

Marc Messing, Andreas Glowatz, Friedrich Hapke, Rolf Drechsler
Workshop:
10th IEEE Latin-American TestWorkshop (LATW)
Reference:

Búzios, Rio de Janeiro, 2009
Hyperlink:

[Link to the Workshop]

















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