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BOOKS

» Formal Specification Level
[Read more about this book!]



Publisher:


Springer
Author:

Mathias Soeken, Rolf Drechsler
Format:
eBook, Hardcover
Year:


2014




» Auf dem Weg zum Quantencomputer - Entwurf reversibler Logik
[Read more about this book!]



Publisher:


Shaker Verlag
Author:

Rolf Drechsler, Mathias Soeken, Robert Wille (Hrsg.)
Format:
gebunden
Year:


2012





BOOK CONTRIBUTIONS
» Logic Synthesis for Majority based In-Memory Computing
Bigpicture: Advances in Memristors, Memristive Devices and Systems Author:

Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Rolf Drechsler

Editor:Sundarapandian Vaidyanathan, Christos Volos
Booktitle:Advances in Memristors, Memristive Devices and Systems
Publisher:Springer
Sites:425 - 448
Year:2017
Format:Hardcover



» A framework for reversible circuit complexity
Bigpicture: Problems and New Solutions in the Boolean Domain Author:

Mathias Soeken, Nabila Abdessaied, Rolf Drechsler

Editor:Bernd Steinbach
Booktitle:Problems and New Solutions in the Boolean Domain
Publisher:Cambridge Scholars Publishing
Sites:327 - 341
Year:2016
Format:Paperback



» Formale Spezifikationsebene
Bigpicture: Ausgezeichnete Informatikdissertationen 2013 Author:

Mathias Soeken

Editor:S. Hölldobler et al.
Booktitle:Ausgezeichnete Informatikdissertationen 2013
Publisher:GI
Sites:241-250
Year:2014
Format:Paperback



» Formal Specification Level
Bigpicture: Models, Methods, and Tools for Complex Chip Design: Selected Contributions from FDL 2012 Author:

Rolf Drechsler, Mathias Soeken, Robert Wille

Editor:Jan Haase
Booktitle:Models, Methods, and Tools for Complex Chip Design: Selected Contributions from FDL 2012
Publisher:Springer
Sites:37-52
Year:2014
Format:Hardcover





JOURNALS

» Logic synthesis for RRAM-based in-memory computing
[Link to the Homepage of this journal]




Author:

Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Rolf Drechsler
Journal:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Details:
accepted
Year:


2017





» A PLiM computer for the IoT
[Link to the Homepage of this journal]




Author:

Mathias Soeken, Pierre-Emmanuel Gaillardon, Saeideh Shirinzadeh, Rolf Drechsler, Giovanni De Micheli
Journal:
Computer
Details:
50(6):35-40, DOI: 10.1109/MC.2017.173
Year:


2017





» Verifying the Structure and Behavior in UML/OCL Models Using Satisfiability Solvers
[Link to the Homepage of this journal]




Author:

Nils Przigoda, Mathias Soeken, Robert Wille, Rolf Drechsler
Journal:
IET Cyber-Physical Systems: Theory & Applications
Details:
Volume 1, Issue 1, December 2016, pp. 49-59
DOI: 10.1049/iet-cps.2016.0022
Year:


2016





» metaSMT: Focus On Your Application And Not On Solver Integration
[Link to the Homepage of this journal]




Author:

Heinz Riener, Finn Haedicke, Stefan Frehse, Mathias Soeken, Daniel Große, Rolf Drechsler, Görschwin Fey
Journal:
International Journal of Software Tools for Technology Transfer
Details:
19(5):605-621, DOI10.1007/s10009-016-0426-1 Link
Year:


2017





» Time-resolved detection of diffusion limited temperature gradients inside single isolated burning droplets using Rainbow Refractometry
[Link to the Homepage of this journal]




Author:

Christopher Rosebrock, Saeideh Shirinzadeh, Mathias Soeken, Norbert Riefler, Thomas Wriedt, Rolf Drechsler, Lutz Mädler
Journal:
Combustion and Flame
Details:
Volume 168, June 2016, Pages 255–269
Year:


2016





» Complexity of Reversible Circuits and their Quantum Implementations
[Link to the Homepage of this journal]




Author:

Nabila Abdessaied, Matthew Amy, Rolf Drechsler, Mathias Soeken
Journal:
Theoretical Computer Science
Details:
Volume 618, (March 2016), pp. 85–106. DOI:10.1016/j.tcs.2016.01.011
Year:


2016





» Atomic distributions in crystal structures solved by Boolean satisfiability techniques
[Link to the Homepage of this journal]




Author:

Mathias Soeken, Rolf Drechsler, Reinhard X. Fischer
Journal:
Zeitschrift für Kristallographie - Crystalline Materials
Details:
Z. Kristallogr. 2016; 231(2): 107–111
Year:


2015





» SyReC: A Hardware Description Language for the Specification and Synthesis of Reversible Circuits
[Link to the Homepage of this journal]




Author:

Robert Wille, Eleonora Schonborn, Mathias Soeken, Rolf Drechsler
Journal:
INTEGRATION, the VLSI Journal
Details:
53(3):39-53
Year:


2016





» Embedding of Large Boolean Functions for Reversible Logic
[Link to the Homepage of this journal]




Author:

Mathias Soeken, Robert Wille, Oliver Keszöcze, D. Michael Miller, Rolf Drechsler
Journal:
Journal on Emerging Technologies in Computing Systems (JETC)
Details:
Volume 12, Issue 4
Preprint available at arXiv 1408.3586
Year:


2015





» Ancilla-free synthesis of large reversible functions using binary decision diagrams
[Link to the Homepage of this journal]




Author:

Mathias Soeken, Laura Tague, Gerhard W. Dueck, Rolf Drechsler
Journal:
Journal of Symbolic Computation
Details:
accepted, preprint available at arXiv 1408.3955
Year:


2015





» Upper bounds for reversible circuits based on Young subgroups
[Link to the Homepage of this journal]




Author:

Nabila Abdessaied, Mathias Soeken, Michael Kirkedal Thomsen, Rolf Drechsler
Journal:
Information Processing Letters
Details:
Volume 114, Number 06 (June 2014), pp. 282-286. DOI: 10.1016/j.ipl.2014.01.003
Year:


2014





» Quantum circuits employing roots of the Pauli matrices
[Link to the Homepage of this journal]




Author:

Mathias Soeken, D. Michael Miller, Rolf Drechsler
Journal:
Physical Review A
Details:
Volume 88, 042322, 2013, DOI: 10.1103/PhysRevA.88.042322
Year:


2013





» Trading Off Circuit Lines and Gate Costs in the Synthesis of Reversible Logic
[Link to the Homepage of this journal]




Author:

Robert Wille, Mathias Soeken, D. Michael Miller, Rolf Drechsler
Journal:
INTEGRATION, the VLSI Journal
Details:
Volume 47, Number 2, pp. 284-294, DOI: 10.1016/j.vlsi.2013.08.002
Year:


2014





» Speci fication-Driven Model Transformation Testing
[Link to the Homepage of this journal]




Author:

Esther Guerra, Mathias Soeken
Journal:
Software and Systems Modeling
Details:
accepted
Year:


2013





» Effect of Negative Control Lines on the Exact Synthesis of Reversible Circuits
[Link to the Homepage of this journal]




Author:

Robert Wille, Mathias Soeken, Nils Przigoda, Rolf Drechsler
Journal:
Multiple-Valued Logic and Soft Computing
Details:
Volume 21, Number 5-6, 2013, pp. 627-640
Year:


2013





» RevKit: An Open Source Toolkit for the Design of Reversible Circuits
[Link to the Homepage of this journal]




Author:

Mathias Soeken, Stefan Frehse, Robert Wille, Rolf Drechsler
Journal:
Reversible Computation 2011 (Series: Lecture Notes in Computer Science)
Details:
Volume 7165, Third International Workshop, RC 2011, Revised Papers, pp. 64-76
Year:


2012





» RevKit: A Toolkit for Reversible Circuit Design
[Link to the Homepage of this journal]




Author:

Mathias Soeken, Stefan Frehse, Robert Wille, Rolf Drechsler
Journal:
Multiple-Valued Logic and Soft Computing
Details:
Volume 18, Number 1, pp. 55-65
Year:


2012






CONFERENCES



» An Adaptive Prioritized ε-Preferred Evolutionary Algorithm for Approximate BDD Optimization




Author:

Saeideh Shirinzadeh, Mathias Soeken, Daniel Große, Rolf Drechsler
Conference:
Genetic and Evolutionary Computation Conference (GECCO)
Reference:

Berlin, Germany, 2017
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Endurance Management for Resistive Logic-In-Memory Computing Architectures




Author:

Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Rolf Drechsler
Conference:
Design, Automation and Test in Europe (DATE)
Reference:

Lausanne, Switzerland, 2017
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Equivalence Checking Using Gröbner Bases




Author:

Amr Sayed Ahmed, Daniel Große, Mathias Soeken, Rolf Drechsler
Conference:
Formal Methods in Computer Aided Design (FMCAD)
Reference:

Mountain View, USA, 2016
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Approximation-aware Rewriting of AIGs for Error Tolerant Applications




Author:

Arun Chandrasekharan, Mathias Soeken, Daniel Große, Rolf Drechsler
Conference:
International Conference on Computer Aided Design (ICCAD)
Reference:

Austin, USA, 2016
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Enumeration of reversible functions and its application to circuit complexity




Author:

Mathias Soeken, Nabila Abdessaied, Giovanni De Micheli
Conference:
Reversible Computation
Reference:

Bologna, Italy, 2016
Hyperlink:

[To the Site of this Conference]



» Approximate BDD Optimization with Prioritized ε-Preferred Evolutionary Algorithm




Author:

Saeideh Shirinzadeh, Mathias Soeken, Daniel Große, Rolf Drechsler
Conference:
Genetic and Evolutionary Computation Conference (GECCO)
Reference:

Denver, USA, 2016
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» An MIG-based Compiler for Programmable Logic-in-Memory Architectures




Author:

Mathias Soeken, Saeideh Shirinzadeh, Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Rolf Drechsler, Giovanni De Micheli
Conference:
Design Automation Conference (DAC)
Reference:

Austin, USA, 2016
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Precise Error Determination of Approximated Components in Sequential Circuits with Model Checking




Author:

Arun Chandrasekharan, Mathias Soeken, Daniel Große, Rolf Drechsler
Conference:
Design Automation Conference (DAC)
Reference:

Austin, USA, 2016
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Multi-Objective BDD Optimization for RRAM based Circuit Design




Author:

Saeideh Shirinzadeh, Mathias Soeken, Rolf Drechsler
Conference:
IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS'16)
Reference:

Košice, Slovakia, 2016
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Technology mapping of reversible circuits to Clifford+T quantum circuits




Author:

Nabila Abdessaied, Matthew Amy, Mathias Soeken, Rolf Drechsler
Conference:
46rd International Symposium on Multiple-Valued Logic (ISMVL)
Reference:

Sapporo, Japan, 2016
Hyperlink:

[To the Site of this Conference]



» Formal Verification of Integer Multipliers by Combining Gröbner Basis with Logic Reduction




Author:

Amr Sayed Ahmed, Daniel Große, Ulrich Kühne, Mathias Soeken, Rolf Drechsler
Conference:
Design, Automation and Test in Europe (DATE)
Reference:

pp. 1048-1053, Dresden, Germany, 2016
Best Paper Candidate
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Fast Logic Synthesis for RRAM-based In-Memory Computing using Majority-Inverter Graphs




Author:

Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Rolf Drechsler
Conference:
Design, Automation and Test in Europe (DATE)
Reference:

Dresden, Germany, 2016
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Optimizing Majority-Inverter Graphs With Functional Hashing




Author:

Mathias Soeken, Pierre-Emmanuel Gaillardon, Luca Amaru, Giovanni De Micheli
Conference:
Design, Automation and Test in Europe (DATE)
Reference:

Dresden, Germany, 2016
Hyperlink:

[To the Site of this Conference]



» BDD Minimization for Approximate Computing




Author:

Mathias Soeken, Daniel Große, Arun Chandrasekharan, Rolf Drechsler
Conference:
Asia and South Pacific Design Automation Conference (ASP-DAC)
Reference:

pp. 474-479, Macao, China, 2016
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Reverse Engineering with Simulation Graphs




Author:

Mathias Soeken, Baruch Sterin, Rolf Drechsler, Robert K. Brayton
Conference:
Formal Methods in Computer Aided Design (FMCAD)
Reference:

Austin, 2015
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Reversible Circuit Rewriting with Simulated Annealing




Author:

Nabila Abdessaied, Mathias Soeken, Gerhard W. Dueck, and Rolf Drechsler
Conference:
IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
Reference:

Daejeon, Korea, 2015
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Coverage of OCL Operation Specifications and Invariants




Author:

Mathias Soeken, Julia Seiter, Rolf Drechsler
Conference:
9th International Conference on Tests & Proofs (TAP)
Reference:

L’Aquila, Italy, 2015
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Ricercar: A Language for Describing and Rewriting Reversible Circuits with Ancillae and its Permutation Semantics




Author:

Michael Kirkedal Thomsen, Mathias Soeken, Robin Kaarsgaard
Conference:
Reversible Computation
Reference:

Grenoble, France, 2015
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Technology mapping for quantum circuits using Boolean functional decomposition




Author:

Nabila Abdessaied, Mathias Soeken, Rolf Drechsler
Conference:
Reversible Computation
Reference:

Grenoble, France, 2015
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Multi-Objective BDD Optimization with Evolutionary Algorithms




Author:

Saeideh Shirinzadeh, Mathias Soeken, Rolf Drechsler
Conference:
Genetic and Evolutionary Computation Conference (GECCO)
Reference:

Madrid, 2015
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Requirement Phrasing Assistance using Automatic Quality Assessment




Author:

Arman Allahyari-Abhari, Mathias Soeken, Rolf Drechsler
Conference:
IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS'15)
Reference:

Belgrade, Serbia, 2015
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Fredkin-Enabled Transformation-based Reversible Logic Synthesis




Author:

Mathias Soeken, Anupam Chattopadhyay
Conference:
45th International Symposium on Multiple-Valued Logic (ISMVL)
Reference:

Waterloo, Canada, 2015
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Dynamic Template Matching with Mixed-polarity Toffoli Gates




Author:

Md Mazder Rahman, Mathias Soeken, Gerhard W. Dueck
Conference:
45th International Symposium on Multiple-Valued Logic (ISMVL)
Reference:

Waterloo, Canada, 2015
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Automated and Quality-driven Requirements Engineering




Author:

Rolf Drechsler, Mathias Soeken, Robert Wille,
Conference:
International Conference on Computer Aided Design (ICCAD)
Reference:

San Jose, 2014
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» metaSMT: A Unified Interface to SMT-LIB2




Author:

Heinz Riener, Mathias Soeken, Clemens Werther, Görschwin Fey, Rolf Drechsler
Conference:
Forum on specification & Design Languages (FDL'14)
Reference:

pp. 1-6, Munich, Germany, 2014
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Automating the Translation of Assertions Using Natural Language Processing Techniques




Author:

Mathias Soeken, Christopher B. Harris, Nabila Abdessaied, Ian G. Harris and Rolf Drechsler
Conference:
Forum on specification & Design Languages (FDL)
Reference:

Munich, Germany, 2014
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Quality Assessment for Requirements based on Natural Language Processing




Author:

Mathias Soeken, Nabila Abdessaied, Arman Allahyari-Abhari, Andi Buzo, Liana Musat, Georg Pelz, Rolf Drechsler
Conference:
Special Session at the Forum on Specification & Design Languages (FDL'14)
Reference:

Munich, Germany, 2014
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Self-Verification as the Key Technology for Next Generation Electronic Systems




Author:

Rolf Drechsler, Hoang M. Le, Mathias Soeken
Conference:
Symposium on Integrated Circuits and System Design (SBCCI)
Reference:

Aracaju, Brazil, 2014
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Behaviour Driven Development for Tests and Verification




Author:

Melanie Diepenbeck, Ulrich Kühne, Mathias Soeken, Rolf Drechsler
Conference:
8th International Conference on Tests & Proofs (TAP)
Reference:

pp. 61-77, York, 2014
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Mapping NCV Circuits to Optimized Clifford+T Circuits




Author:

D. Michael Miller, Mathias Soeken, Rolf Drechsler
Conference:
Reversible Computation
Reference:

Kyoto, Japan, 2014
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Quantum Circuit Optimization by Hadamard Gate Reduction




Author:

Nabila Abdessaied, Mathias Soeken, Rolf Drechsler
Conference:
Reversible Computation
Reference:

Kyoto, Japan, 2014
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Grammar-based Program Generation Based on Model Finding




Author:

Mathias Soeken, Rolf Drechsler
Conference:
IEEE Design and Test Symposium 2013 (IDT)
Reference:

Marrakesch, 2013
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» White Dots do Matter: Rewriting Reversible Logic Circuits




Author:

Mathias Soeken, Michael Kirkedal Thomsen
Conference:
Reversible Computation
Reference:

pp. 196-208, Victoria, Canada, 2013
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Reducing the Depth of Quantum Circuits Using Additional Lines




Author:

Nabila Abdessaied, Robert Wille, Mathias Soeken, Rolf Drechsler
Conference:
Reversible Computation
Reference:

pp. 221-233, Victoria, Canada, 2013
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Hardware-Software Co-Visualization: Developing Systems in the Holodeck




Author:

Rolf Drechsler, Mathias Soeken
Conference:
16th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
Reference:

pp. 1-4, Karlovy Vary, Czech Republic, 2013
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Debugging of Reversible Circuits using πDDs




Author:

Laura Tague, Mathias Soeken, Shin-ichi Minato, Rolf Drechsler
Conference:
43rd International Symposium on Multiple-Valued Logic (ISMVL)
Reference:

pp. 316-321, Toyama, Japan, 2013
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Exact Template Matching Using Boolean Satisfiability




Author:

Nabila Abdessaied, Mathias Soeken, Robert Wille, Rolf Drechsler
Conference:
43rd International Symposium on Multiple-Valued Logic (ISMVL)
Reference:

pp. 328-333, Toyama, Japan, 2013
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Determining Relevant Model Elements for the Verification of UML/OCL Specifications




Author:

Julia Seiter, Robert Wille, Mathias Soeken, Rolf Drechsler
Conference:
Design, Automation and Test in Europe (DATE)
Reference:

pp. 1189-1192, Grenoble, France, 2013
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Towards a Generic Verification Methodology for System Models




Author:

Robert Wille, Martin Gogolla, Mathias Soeken, Mirco Kuhlmann, Rolf Drechsler
Conference:
Design, Automation and Test in Europe (DATE)
Reference:

pp. 1193-1196, Grenoble, France, 2013
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Improving the Mapping of Reversible Circuits to Quantum Circuits Using Multiple Target Lines




Author:

Robert Wille, Mathias Soeken, Christian Otterstedt, Rolf Drechsler
Conference:
Asia and South Pacific Design Automation Conference (ASP-DAC)
Reference:

pp. 145-150. Yokohama, Japan, 2013
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Towards Dialog Systems for Assisted Natural Language Processing in the Design of Embedded Systems




Author:

Rolf Drechsler, Mathias Soeken, Robert Wille
Conference:
IEEE Design and Test Symposium 2012 (IDT)
Reference:

Doha, 2012
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Completeness-Driven Development




Author:

Rolf Drechsler, Melanie Diepenbeck, Daniel Große, Ulrich Kühne, Hoang M. Le, Julia Seiter, Mathias Soeken, Robert Wille
Conference:
International Conference on Graph Transformation
Reference:

pp. 38-50, Bremen, 2012
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Formal Specification Level: Towards Verification-driven Design Based on Natural Language Processing




Author:

Rolf Drechsler, Mathias Soeken, Robert Wille
Conference:
Forum on specification & Design Languages (FDL)
Reference:

pp. 53-58, Vienna, Austria, 2012
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Circuit Line Minimization in the HDL-based Synthesis of Reversible Logic




Author:

Robert Wille, Mathias Soeken, Eleonora Schönborn, Rolf Drechsler
Conference:
IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Reference:

pp. 213-218, Amherst, USA, 2012
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Assisted Behavior Driven Development Using Natural Language Processing




Author:

Mathias Soeken, Robert Wille, Rolf Drechsler
Conference:
50th International Conference on Objects, Models, Components, Patterns (TOOLS)
Reference:

pp. 269-287, Prague, Czech Republic, 2012
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Optimizing the Mapping of Reversible Circuits to Four-Valued Quantum Gate Circuits




Author:

Mathias Soeken, Zahra Sasanian, Robert Wille, D. Michael Miller, Rolf Drechsler
Conference:
42nd International Symposium on Multiple-Valued Logic (ISMVL)
Reference:

pp. 173-178, Victoria, Canada, 2012
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» A Synthesis Flow for Sequential Reversible Circuits




Author:

Mathias Soeken, Robert Wille, Christian Otterstedt, Rolf Drechsler
Conference:
42nd International Symposium on Multiple-Valued Logic (ISMVL)
Reference:

pp. 299-304, Victoria, Canada, 2012
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Exact Synthesis of Toffoli Gate Circuits with Negative Control Lines




Author:

Robert Wille, Mathias Soeken, Nils Przigoda, Rolf Drechsler
Conference:
42nd International Symposium on Multiple-Valued Logic (ISMVL)
Reference:

pp. 69-74, Victoria, Canada, 2012
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Eliminating Invariants in UML/OCL Models




Author:

Mathias Soeken, Robert Wille, Rolf Drechsler
Conference:
Design, Automation and Test in Europe (DATE)
Reference:

pp. 1142-1145, Dresden, 2012
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Debugging of Inconsistent UML/OCL Models




Author:

Robert Wille, Mathias Soeken, Rolf Drechsler
Conference:
Design, Automation and Test in Europe (DATE)
Reference:

pp. 1078-1083, Dresden, 2012
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Synthesis of Reversible Circuits with Minimal Lines for Large Functions




Author:

Mathias Soeken, Robert Wille, Christoph Hilken, Nils Przigoda, Rolf Drechsler
Conference:
Asia and South Pacific Design Automation Conference (ASP-DAC)
Reference:

pp. 85-92, Sydney, 2012
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Encoding OCL Data Types for SAT-based Verification of UML/OCL Models




Author:

Mathias Soeken, Robert Wille, Rolf Drechsler
Conference:
5th International Conference on Tests & Proofs (TAP)
Reference:

pp. 152-170, Zurich, 2011
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Automatic Property Generation for the Formal Verification of Bus Bridges




Author:

Mathias Soeken, Ulrich Kühne, Martin Freibothe, Görschwin Fey, Rolf Drechsler
Conference:
14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
Reference:

pp. 417-422, Cottbus, 2011
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Designing a RISC CPU in Reversible Logic




Author:

Robert Wille, Mathias Soeken, Daniel Große, Eleonora Schönborn, Rolf Drechsler
Conference:
41st International Symposium on Multiple-Valued Logic (ISMVL)
Reference:

pp. 170-175, Tuusula, 2011
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Verifying Dynamic Aspects of UML Models




Author:

Mathias Soeken, Robert Wille, Rolf Drechsler
Conference:
Design, Automation and Test in Europe (DATE)
Reference:

pp. 1077-1082, Grenoble, 2011
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Reducing the Number of Lines in Reversible Circuits




Author:

Robert Wille, Mathias Soeken, Rolf Drechsler
Conference:
Design Automation Conference (DAC)
Reference:

pp. 647-652, Anaheim, 2010
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Window Optimization of Reversible and Quantum Circuits




Author:

Mathias Soeken, Robert Wille, Gerhard W. Dueck, Rolf Drechsler
Conference:
13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
Reference:

pp. 431-435, Vienna, 2010
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Verifying UML/OCL Models Using Boolean Satisfiability




Author:

Mathias Soeken, Robert Wille, Mirco Kuhlmann, Martin Gogolla, Rolf Drechsler
Conference:
Design, Automation and Test in Europe (DATE)
Reference:

pp. 1341-1344, Dresden, 2010
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Using Higher Levels of Abstraction for Solving Optimization Problems by Boolean Satisfiability




Author:

Robert Wille, Daniel Große, Mathias Soeken, Rolf Drechsler
Conference:
IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Reference:

pp. 411-416, Montpellier, 2008
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]


WORKSHOPS




» On the computational complexity of error metrics in approximate computing




Author:

Oliver Keszöcze, Mathias Soeken, Rolf Drechsler
Workshop:
International Workshop on Boolean Problems
Reference:

Freiberg, Germany, 2016
Hyperlink:

[Link to the Workshop]



» Symbolic Error Metric Determination for Approximate Computing




Author:

Arun Chandrasekharan, Daniel Große, Mathias Soeken, Rolf Drechsler
Workshop:
19. ITG/GMM/GI-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV'16)
Reference:

Freiburg, Germany, 2016
Hyperlink:

[Link to the Workshop]



» Towards an Automatic Approach for Restricting UML/OCL Invariability Clauses




Author:

Nils Przigoda, Judith Peters, Mathias Soeken, Robert Wille, Rolf Drechsler
Workshop:
Workshop on Model-Driven Engineering, Verification, and Validation (MoDeVVa)
Reference:

Ottawa, Canada, 2015
Hyperlink:

[Link to the Workshop]



» Simulation Graphs for Reverse Engineering




Author:

Baruch Sterin, Mathias Soeken, Rolf Drechsler, Robert K. Brayton
Workshop:
International Workshop on Logic Synthesis (IWLS)
Reference:

Mountain View, CA, USA, 2015
Hyperlink:

[Link to the Workshop]



» Self-Inverse Functions and Palindromic Circuits




Author:

Mathias Soeken, Michael Kirkedal Thomsen, Gerhard W. Dueck, D. Michael Miller
Workshop:
Reed-Muller Workshop
Reference:

Waterloo, Canada, 2015, pre-print available at arXiv:1502.05825
Hyperlink:

[Link to the Workshop]



» Coverage at the Formal Specification Level




Author:

Rolf Drechsler, Julia Seiter, Mathias Soeken
Workshop:
International Workshop on Design and Implementation of Formal Tools and Systems (DIFTS)
Reference:

Lausanne, Switzerland, 2014
Hyperlink:

[Link to the Workshop]



» A framework for reversible circuit complexity




Author:

Mathias Soeken, Nabila Abdessaied, Rolf Drechsler
Workshop:
10th International Workshop on Boolean Problems
Reference:

Freiberg, Germany, 2014, post-print available at arXiv:1407.5878
PDF:

[view Pdf]
PS:

[view PS]
Hyperlink:

[Link to the Workshop]



» Towards a Multi-dimensional and Dynamic Visualization for ESL Designs




Author:

Jannis Stoppe, Marc Michael, Mathias Soeken, Robert Wille, Rolf Drechsler
Workshop:
DATE Friday Workshop: Design Automation for Understanding Hardware Designs
Reference:

Dresden, Germany, 2014
Hyperlink:

[Link to the Workshop]



» Formale Methoden für Alle




Author:

Mathias Soeken, Max Nitze, Rolf Drechsler
Workshop:
17. ITG/GMM/GI-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV'14)
Reference:

Böblingen, Germany, 2014
Hyperlink:

[Link to the Workshop]



» Law-based Verification for Complex Swarm Systems




Author:

Rolf Drechsler, Hoang M. Le, Mathias Soeken, Robert Wille
Workshop:
International Workshop on the Swarm at the Edge of the Cloud
Reference:

Montreal, Canada
Hyperlink:

[Link to the Workshop]



» lips: An IDE for Model Driven Engineering Based on Natural Language Processing




Author:

Oliver Keszöcze, Mathias Soeken, Eugen Kuksa, Rolf Drechsler
Workshop:
Workshop on Natural Language Analysis in Software Engineering (NaturaLiSE)
Reference:

pp. 31—38, San Francisco, 2013
PDF:

[view Pdf]
Hyperlink:

[Link to the Workshop]



» Towards Automatic Scenario Generation from Coverage Information




Author:

Melanie Diepenbeck, Mathias Soeken, Daniel Große, Rolf Drechsler
Workshop:
8th International Workshop on Automation of Software Test (AST)
Reference:

pp. 82-88, San Francisco, 2013
PDF:

[view Pdf]
Hyperlink:

[Link to the Workshop]



» Generierung von OCL-Ausdrücken aus natürlichsprachlichen Beschreibungen




Author:

Mathias Soeken, Robert Wille, Eugen Kuksa, Rolf Drechsler
Workshop:
16. ITG/GMM/GI-Workshop "Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen"
Reference:

Rostock, 2013
Hyperlink:

[Link to the Workshop]



» Verification of Embedded Systems Using Modeling and Implementation Languages




Author:

Mathias Soeken, Heinz Riener, Robert Wille, Görschwin Fey, Rolf Drechsler
Workshop:
International Workshop on Metamodelling and Code Generation for Embedded Systems (MeCoEs'12)
Reference:

pp. 67-72, Tampere, Finland, 2012
PDF:

[view Pdf]
Hyperlink:

[Link to the Workshop]



» Behavior Driven Development for Circuit Design and Verification




Author:

Melanie Diepenbeck, Mathias Soeken, Daniel Große, Rolf Drechsler
Workshop:
IEEE International Workshop on High-Level Design Validation and Test (HLDVT)
Reference:

pp. 9-16, Huntington Beach, USA, 2012
PDF:

[view Pdf]
Hyperlink:

[Link to the Workshop]



» Towards Embedding of Large Functions for Reversible Logic




Author:

Mathias Soeken, Robert Wille, Laura Tague, D. Michael Miller, Rolf Drechsler
Workshop:
International Workshop on Boolean Problems
Reference:

Freiberg, 2012
Hyperlink:

[Link to the Workshop]



» Using πDDs in the Design for Reversible Circuits




Author:

Mathias Soeken, Robert Wille, Shin-Ichi Minato, Rolf Drechsler
Workshop:
Workshop on Reversible Computation
Reference:

Kopenhagen, 2012
Hyperlink:

[Link to the Workshop]



» Property Checking of Quantum Circuits Using Quantum Multiple-Valued Decision Diagrams




Author:

Julia Seiter, Mathias Soeken, Robert Wille, Rolf Drechsler
Workshop:
Workshop on Reversible Computation
Reference:

Kopenhagen, 2012
Hyperlink:

[Link to the Workshop]



» Towards Automatic Determination of Problem Bounds for Object Instantiation in Static Model Verification




Author:

Mathias Soeken, Robert Wille, Rolf Drechsler
Workshop:
Model-Driven Engineering, Verification, And Validation (MoDeVVa)
Reference:

Wellington, 2011
Hyperlink:

[Link to the Workshop]



» Synthesis of Reversible Circuits with Minimal Lines for Large Functions




Author:

Mathias Soeken, Robert Wille, Christoph Hilken, Nils Przigoda, Rolf Drechsler
Workshop:
Workshop on Reversible Computation
Reference:

pp. 59-70, Gent, 2011
Hyperlink:

[Link to the Workshop]



» Customized Design Flows for Reversible Circuits Using RevKit




Author:

Mathias Soeken, Stefan Frehse, Robert Wille, Rolf Drechsler
Workshop:
Workshop on Reversible Computation
Reference:

pp. 91-96, Gent, 2011
Hyperlink:

[Link to the Workshop]



» Designing a RISC CPU in Reversible Logic




Author:

Robert Wille, Mathias Soeken, Daniel Große, Eleonora Schönborn, Rolf Drechsler
Workshop:
14. ITG/GMM/GI-Workshop "Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen"
Reference:

pp. 249-258, Oldenburg, 2011
Hyperlink:

[Link to the Workshop]



» Towards Automatic Property Generation for the Formal Verification of Bus Bridges




Author:

Mathias Soeken, Ulrich Kühne, Martin Freibothe, Görschwin Fey, Rolf Drechsler
Workshop:
14. ITG/GMM/GI-Workshop "Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen"
Reference:

Oldenburg, 2011
Hyperlink:

[Link to the Workshop]



» Hierarchical Synthesis of Reversible Circuits Using Positive and Negative Davio Decomposition




Author:

Mathias Soeken, Robert Wille, Rolf Drechsler
Workshop:
5th International Design & Test Workshop (IDT)
Reference:

pp. 143-148, Abu Dhabi, 2010
PDF:

[view Pdf]
Hyperlink:

[Link to the Workshop]



» RevKit: A Toolkit for Reversible Circuit Design




Author:

Mathias Soeken, Stefan Frehse, Robert Wille, Rolf Drechsler
Workshop:
Workshop on Reversible Computation
Reference:

pp. 69-72, Bremen, 2010
PDF:

[view Pdf]
Hyperlink:

[Link to the Workshop]



» Hierarchical Synthesis of Reversible Circuits Using Positive and Negative Davio Decomposition




Author:

Mathias Soeken, Robert Wille, Rolf Drechsler
Workshop:
Workshop on Reversible Computation
Reference:

pp. 55-58, Bremen, 2010
Hyperlink:

[Link to the Workshop]



» Verifying UML/OCL Models Using Boolean Satisfiability




Author:

Mathias Soeken, Robert Wille, Mirco Kuhlmann, Martin Gogolla, Rolf Drechsler
Workshop:
13. ITG/GMM/GI-Workshop "Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen"
Reference:

pp 57-66, Dresden, 2010
Hyperlink:

[Link to the Workshop]

















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