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Home « Team « Publications
» Publications of
Saeideh Shirinzadeh
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BOOKS |
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» In-Memory Computing -
Synthesis and Optimization
[Read more about this book!]
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Publisher: |
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Springer |
Author:
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Saeideh Shirinzadeh, Rolf Drechsler |
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Hardcover |
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2020
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BOOK CONTRIBUTIONS |
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| » In-Memory Computing:
The Integration of Storage and Processing |
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Author:
| Saeideh Shirinzadeh, Rolf Drechsler
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| Editor: | Cornelia S. Große, Rolf Drechsler |
| Booktitle: | Information Storage
A Multidisciplinary Perspective |
| Publisher: | Springer |
| Sites: | |
| Year: | 2019 |
| Format: | Hardcover |
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| » Logic Synthesis for Majority based In-Memory Computing |
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Author:
| Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Rolf Drechsler
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| Editor: | Sundarapandian Vaidyanathan, Christos Volos |
| Booktitle: | Advances in Memristors, Memristive Devices and Systems |
| Publisher: | Springer |
| Sites: | 425 - 448 |
| Year: | 2017 |
| Format: | Hardcover |
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JOURNALS |
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» Parallel Computing of Graph-Based functions in ReRAM
[Link to the Homepage of this journal]
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Author:
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Saman Fröhlich, Saeideh Shirinzadeh, Rolf Drechsler |
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Journal on Emerging Technologies in Computing Systems (JETC) |
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https://doi.org/ 10.1145/3453163 |
Year:
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2021
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» Logic synthesis for RRAM-based in-memory computing
[Link to the Homepage of this journal]
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Author:
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Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Rolf Drechsler |
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
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vol. 37, no. 7, pp. 1422-1435, July 2018.
DOI: 10.1109/TCAD.2017.2750064 |
Year:
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2018
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» Synthesis of optical circuits using binary decision diagrams
[Link to the Homepage of this journal]
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Author:
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Arighna Deb, Robert Wille, Oliver Keszöcze, Saeideh Shirinzadeh, Rolf Drechsler |
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Integration, the VLSI Journal |
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Volume 59, September 2017, Pages 42–51 |
Year:
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2017
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» A PLiM computer for the IoT
[Link to the Homepage of this journal]
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Author:
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Mathias Soeken, Pierre-Emmanuel Gaillardon, Saeideh Shirinzadeh, Rolf Drechsler, Giovanni De Micheli |
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Computer |
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50(6):35-40, DOI: 10.1109/MC.2017.173 |
Year:
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2017
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» Time-resolved detection of diffusion limited temperature gradients inside single isolated burning droplets using Rainbow Refractometry
[Link to the Homepage of this journal]
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Author:
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Christopher Rosebrock, Saeideh Shirinzadeh, Mathias Soeken, Norbert Riefler, Thomas Wriedt, Rolf Drechsler, Lutz Mädler |
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Combustion and Flame |
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Volume 168, June 2016, Pages 255–269 |
Year:
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2016
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» High Efficiency Time Redundant Hardened Latch for Reliable Circuit Design
[Link to the Homepage of this journal]
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Author:
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Rahebeh Niaraki Asli, Saeideh Shirinzadeh |
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Journal of Electronic Testing |
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Volume 29, Issue 4, pp 537-544 |
Year:
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2013
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CONFERENCES |
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» Automated Equivalence Checking Method for Majority based In-Memory Computing on ReRAM Crossbars
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Author:
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Arighna Deb, Kamalika Datta, Muhammad Hassan, Saeideh Shirinzadeh, Rolf Drechsler |
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Asia and South Pacific Design Automation Conference (ASP-DAC) |
Reference:
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| Tokyo, Japan, 2023
| Hyperlink:
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| [To the Site of this Conference]
| PDF:
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» Unlocking High Resolution Arithmetic Operations within Memristive Crossbars for Error Tolerant Applications
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Author:
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Kamalika Datta, Saman Froehlich, Saeideh Shirinzadeh, Dev Narayan, Yadav Indranil Sengupta and Rolf
Drechsler |
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IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) |
Reference:
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| Patras, Greece, 2022
| Hyperlink:
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| [To the Site of this Conference]
| PDF:
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» Unlocking Sneak Path Analysis in Memristor Based Logic Design Styles
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Author:
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Kamalika Datta, Saeideh Shirinzadeh, Phrangboklang Lyngton Thangkhiew, Indranil Sengupta and Rolf Drechsler |
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Euromicro Conference on Digital System Design (DSD) |
Reference:
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| Gran Canaria, Spain, 2022
| Hyperlink:
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| [To the Site of this Conference]
| PDF:
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» Multiply-Accumulate Enhanced BDD-Based Logic Synthesis on RRAM Crossbars
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Author:
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Saman Fröhlich,
Saeideh Shirinzadeh,
Rolf Drechsler |
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IEEE International Symposium on Circuits & Systems (ISCAS) |
Reference:
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| Sevilla, Spain, 2020
| Hyperlink:
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| [To the Site of this Conference]
| PDF:
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» ComPRIMe: A Compiler for Parallel and Scalable ReRAM-based In-Memory Computing
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Author:
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Steffen Frerix,
Saeideh Shirinzadeh,
Saman Fröhlich,
Rolf Drechsler |
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International Symposium on Nanoscale Architectures (NanoArch 2019) |
Reference:
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| Qingdao, China, 2019
| PDF:
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| [view Pdf]
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» Logic Synthesis for Hybrid CMOS-ReRAM Sequential Circuits
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Author:
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Saman Fröhlich, Saeideh Shirinzadeh, Rolf Drechsler |
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IEEE Computer Society Annual Symposium on VLSI (ISVLSI) |
Reference:
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| Miami, Florida, USA, 2019
| Hyperlink:
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| [To the Site of this Conference]
| PDF:
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| [view Pdf]
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» Logic Synthesis for In-Memory Computing using Resistive Memories
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Author:
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Saeideh Shirinzadeh, Rolf Drechsler |
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IEEE Computer Society Annual Symposium on VLSI (ISVLSI) |
Reference:
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| Hong Kong SAR, China, 2018
| Hyperlink:
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| [To the Site of this Conference]
| PDF:
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» Logic Design using Memristors: An Emerging Technology
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Author:
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Saeideh Shirinzadeh, Kamalika Datta, Rolf Drechsler |
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IEEE International Symposium on Multiple-Valued Logic (ISMVL) |
Reference:
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| Linz, Austria, 2018
| Hyperlink:
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| [To the Site of this Conference]
| PDF:
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» An Adaptive Prioritized ε-Preferred Evolutionary Algorithm for Approximate BDD Optimization
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Author:
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Saeideh Shirinzadeh, Mathias Soeken, Daniel Große, Rolf Drechsler |
| Conference: |
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Genetic and Evolutionary Computation Conference (GECCO) |
Reference:
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| Berlin, Germany, 2017
| Hyperlink:
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| [To the Site of this Conference]
| PDF:
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» Endurance Management for Resistive Logic-In-Memory Computing Architectures
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Author:
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Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Rolf Drechsler |
| Conference: |
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Design, Automation and Test in Europe (DATE) |
Reference:
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| Lausanne, Switzerland, 2017
| Hyperlink:
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| [To the Site of this Conference]
| PDF:
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» Approximate BDD Optimization with Prioritized ε-Preferred Evolutionary Algorithm
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Author:
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Saeideh Shirinzadeh, Mathias Soeken, Daniel Große, Rolf Drechsler |
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Genetic and Evolutionary Computation Conference (GECCO) |
Reference:
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| Denver, USA, 2016
| Hyperlink:
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| [To the Site of this Conference]
| PDF:
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» An MIG-based Compiler for Programmable Logic-in-Memory Architectures
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Author:
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Mathias Soeken, Saeideh Shirinzadeh, Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Rolf Drechsler, Giovanni De Micheli
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| Conference: |
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Design Automation Conference (DAC) |
Reference:
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| Austin, USA, 2016
| Hyperlink:
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| [To the Site of this Conference]
| PDF:
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| [view Pdf]
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» Multi-Objective BDD Optimization for RRAM based Circuit Design
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Author:
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Saeideh Shirinzadeh, Mathias Soeken, Rolf Drechsler |
| Conference: |
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IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS'16) |
Reference:
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| Košice, Slovakia, 2016
| Hyperlink:
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| [To the Site of this Conference]
| PDF:
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| [view Pdf]
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» Fast Logic Synthesis for RRAM-based In-Memory Computing using Majority-Inverter Graphs
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Author:
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Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Rolf Drechsler |
| Conference: |
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Design, Automation and Test in Europe (DATE) |
Reference:
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| Dresden, Germany, 2016
| Hyperlink:
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| [To the Site of this Conference]
| PDF:
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| [view Pdf]
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» Multi-Objective BDD Optimization with Evolutionary Algorithms
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Author:
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Saeideh Shirinzadeh, Mathias Soeken, Rolf Drechsler |
| Conference: |
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Genetic and Evolutionary Computation Conference (GECCO) |
Reference:
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| Madrid, 2015
| Hyperlink:
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| [To the Site of this Conference]
| PDF:
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| [view Pdf]
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WORKSHOPS |
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