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» Integrating Hybrid Analysis with Machine Learning Techniques for Portion Resilience Evaluation in Approximating SystemC-based Designs




Author:

Mehran Goli, Rolf Drechsler
Workshop:
Workshop on Machine Learning for CAD (MLCAD)
Reference:

Canmore (Banff Area), Alberta, Canada, 2019
Hyperlink:

[Link to the Workshop]



» GenMul: Generating architecturally complex multipliers to challenge formal verification tools




Author:

Alireza Mahzoon, Daniel Große, Rolf Drechsler
Workshop:
International Workshop on Logic & Synthesis (IWLS)
Reference:

Lausanne, Switzerland, 2019
Hyperlink:

[Link to the Workshop]



» fiction: An Open Source Framework for the Design of Field-coupled Nanocomputing Circuits




Author:

Marcel Walter, Robert Wille, Frank Sill Torres, Daniel Große, Rolf Drechsler
Workshop:
International Workshop on Logic & Synthesis (IWLS)
Reference:

Lausanne, Switzerland, 2019
Hyperlink:

[Link to the Workshop]



» Self-Explaining Digital Systems – Some Technical Steps




Author:

Goerschwin Fey and Rolf Drechsler
Workshop:
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
Reference:

Kaiserslautern, Germany, 2019
Hyperlink:

[Link to the Workshop]
PDF:

[click here]



» Towards Gate-Level Design of QCA Circuits




Author:

Philipp Niemann, Igor Kazhdan, Frank Sill Torres, Rolf Drechsler
Workshop:
6th Workshop on Design Automation for Understanding Hardware Designs (DUHDe)
Reference:

Florence, Italy, 2019
Hyperlink:

[Link to the Workshop]



» Enhanced Embedded Test Compression Technique For Processing Incompressible Test Patterns




Author:

Sebastian Huhn, Stephan Eggersglüß and Rolf Drechsler
Workshop:
31. GI/GMM/ITG Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2019)
Reference:

Prien am Chiemsee, Germany, 2019
Hyperlink:

[Link to the Workshop]
PDF:

[click here]



» IR-drop Prediction of Test Patterns Using Parasitic Elements




Author:

Harshad Dhotre, Stephan Eggersglüß, Rolf Drechsler
Workshop:
31. GI/GMM/ITG Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2019)
Reference:

Prien am Chiemsee, Germany, 2019
Hyperlink:

[Link to the Workshop]



» Optimizing Ts in the Synthesis of Clifford+T Quantum Circuits




Author:

Philipp Niemann, Robert Wille, Rolf Drechsler
Workshop:
2nd International Workshop on Quantum Compilation (IWQC, co-located with ICCAD)
Reference:

San Diego, CA, USA, 2018
Hyperlink:

[Link to the Workshop]



» Improving SAT solving using Monte Carlo Tree Search-based Clause Learning




Author:

Oliver Keszöcze, Kenneth Schmitz, Jens Schloeter, Rolf Drechsler
Workshop:
13th International Workshop on Boolean Problems (IWSBP)
Reference:

Bremen, Germany, 2018
Hyperlink:

[Link to the Workshop]



» ConfidenceSat: A Parallel SAT Solver with Conflict Clause Handling




Author:

Kenneth Schmitz, Oliver Keszöcze, Jil Tietjen and Rolf Drechsler
Workshop:
13th International Workshop on Boolean Problems (IWSBP)
Reference:

Bremen, Germany, 2018
Hyperlink:

[Link to the Workshop]



» Towards Self-Explaining Digital Systems: A Design Methodology for the Next Generation




Author:

Rolf Drechsler, Christoph Lüth, Goerschwin Fey, Tim Güneysu
Workshop:
3nd International Verification and Security Workshop (IVSW)
Reference:

Costa Brava, Spain, 2018
Hyperlink:

[Link to the Workshop]
PDF:

[click here]



» Evaluation of Power State Cross Coverage in Firmware-Based Power Management




Author:

Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Workshop:
Embedded Software for Industrial IoTs (ESIIT)
Reference:

Dresden, Germany, 2018
Hyperlink:

[Link to the Workshop]



» Towards Automated Refinement of TLM Properties to RTL




Author:

Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Workshop:
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
Reference:

Tübingen, Germany, 2018
Hyperlink:

[Link to the Workshop]



» A Codeword-based Compaction Technique for On-Chip Generated Debug Data Using Two-Stage Artificial Neural Networks




Author:

Sebastian Huhn, Marcel Merten, Stephan Eggersglüß and Rolf Drechsler
Workshop:
30. GI/GMM/ITG Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2018)
Reference:

Freiburg (Breisgau), Germany, 2018
Hyperlink:

[Link to the Workshop]
PDF:

[click here]



» ATPG Constraint Analysis for Reducing Regional Power Activity




Author:

Harshad Dhotre, Stephan Eggersglüß, Rolf Drechsler, Mehdi Dehbashi, Ulrike Pfannkuchen
Workshop:
30. GI/GMM/ITG Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2018)
Reference:

Freiburg (Breisgau), Germany, 2018
Hyperlink:

[Link to the Workshop]



» Time-stamps for Hardware Simulation Models Accurate Time-back Annotation




Author:

Rehab Massoud, Jannis Stoppe, Karthik Maddikunta, Rolf Drechsler
Workshop:
5th Workshop on Design Automation for Understanding Hardware Designs (DUHDe)
Reference:

Dresden, Germany, 2018
Hyperlink:

[Link to the Workshop]



» Execution Environment for Dynamic Software Runtime Examination




Author:

Kenneth Schmitz, Oliver Keszöcze, Jannis Stoppe, Rolf Drechsler
Workshop:
5th Workshop on Design Automation for Understanding Hardware Designs (DUHDe)
Reference:

Dresden, Germany, 2018
Hyperlink:

[Link to the Workshop]



» Making Waveforms Great Again




Author:

Jannis Stoppe and Rolf Drechsler
Workshop:
4th Workshop on Design Automation for Understanding Hardware Designs (DUHDe)
Reference:

Lausanne, Switzerland, 2017
Hyperlink:

[Link to the Workshop]



» A Human-Centered Approach to Routing for Digital Microfluidic Biochips




Author:

Oliver Keszöcze, Andre Pols and Rolf Drechsler
Workshop:
4th Workshop on Design Automation for Understanding Hardware Designs (DUHDe)
Reference:

Lausanne, Switzerland, 2017
Hyperlink:

[Link to the Workshop]



» Verilog2GEXF - Dynamic Large Scale Circuit Visualization




Author:

Kenneth Schmitz, Jannis Stoppe, Rolf Drechsler
Workshop:
4th Workshop on Design Automation for Understanding Hardware Designs (DUHDe)
Reference:

Lausanne, Switzerland, 2017
Hyperlink:

[Link to the Workshop]



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