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» Logic Synthesis for In-Memory Computing using Resistive Memories




Autor:

Saeideh Shirinzadeh, Rolf Drechsler
Konferenz:
IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Referenz:

Hong Kong SAR, China, 2018
Hyperlink:

[Link zur Konferenz]



» A Novel Approach for Nearest Neighbor Realization of 2D Quantum Circuits




Autor:

Anirban Bhattacharjee, Chandan Bandyopadhyay, Robert Wille, Rolf Drechsler, Hafizur Rahaman
Konferenz:
IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Referenz:

Hong Kong SAR, China, 2018
Hyperlink:

[Link zur Konferenz]



» Combining Symbolic Computer Algebra and Boolean Satisfiability for Automatic Debugging and Fixing of Complex Multipliers




Autor:

Alireza Mahzoon, Daniel Große, Rolf Drechsler
Konferenz:
IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Referenz:

Hong Kong SAR, China, 2018
Hyperlink:

[Link zur Konferenz]



» Towards Dynamic Execution Environment for System Security Protection against Hardware Flaws




Autor:

Kenneth Schmitz, Oliver Keszöcze, Jurij Schmidt, Daniel Große, Rolf Drechsler
Konferenz:
IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Referenz:

Hong Kong SAR, China, 2018
Hyperlink:

[Link zur Konferenz]



» Reliability Improvements for Multiprocessor Systems by Health-Aware Task Scheduling




Autor:

Robert Schmidt, Rehab Massoud, Jaan Raik, Alberto Garcia-Ortiz, Rolf Drechsler
Konferenz:
24th IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS)
Referenz:

Costa Brava, Spain, 2018
Hyperlink:

[Link zur Konferenz]



» Natural Language based Power Domain Partitioning




Autor:

David Lemma, Daniel Große, Rolf Drechsler
Konferenz:
21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
Referenz:

Budapest, Hungary, 2018
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]



» Augmenting All Solution SAT Solving for Circuits with Structural Information




Autor:

Abraham Temesgen Tibebu, Görschwin Fey
Konferenz:
21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
Referenz:

Budapest, Hungary, 2018
Hyperlink:

[Link zur Konferenz]



» Constraint-based Pattern Retargeting for Reducing Localized Power Activity during Testing




Autor:

Harshad Dhotre, Stephan Eggersglüß, Rolf Drechsler, Mehdi Dehbashi, Ulrike Pfannkuchen
Konferenz:
21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
Referenz:

Budapest, Hungary, 2018
Hyperlink:

[Link zur Konferenz]



» SAT-Lancer: A Hardware SAT-Solver for Self-Verification




Autor:

Buse Ustaoglu, Sebastian Huhn, Daniel Große, Rolf Drechsler
Konferenz:
28th ACM Great Lakes Symposium on VLSI (GLVLSI)
Referenz:

Chicago, Illinois, USA, 2018
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]



» Synthesis of Reversible Circuits Using Conventional Hardware Description Languages




Autor:

Zaid Al-Wardi, Robert Wille, Rolf Drechsler
Konferenz:
IEEE International Symposium on Multiple-Valued Logic (ISMVL)
Referenz:

Linz, Austria, 2018
Hyperlink:

[Link zur Konferenz]



» Logic Design using Memristors: An Emerging Technology




Autor:

Saeideh Shirinzadeh, Kamalika Datta, Rolf Drechsler
Konferenz:
IEEE International Symposium on Multiple-Valued Logic (ISMVL)
Referenz:

Linz, Austria, 2018
Hyperlink:

[Link zur Konferenz]



» Translating between the roots of identity in quantum circuits




Autor:

Wouter Castryck, Jeroen Demeyer, Alexis De Vos, Oliver Keszöcze, Mathias Soeken
Konferenz:
48th IEEE International Symposium on Multiple-Valued Logic (ISMVL)
Referenz:

Linz, Austria, 2018
Hyperlink:

[Link zur Konferenz]



» Building Fast Multi-Agent Systems using Hardware Design Languages for High-Throughput Systems




Autor:

Jannis Stoppe, Christina Plump, Sebastian Huhn, Rolf Drechsler
Konferenz:
6th International Conference on Dynamics in Logistics (LDIC)
Referenz:

Bremen, Germany, 2018
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]



» Confident Leakage Assessment - A Side-Channel Evaluation Framework based on Confidence Intervals




Autor:

Florian Bache, Christina Plump, Tim Güneysu
Konferenz:
Design, Automation and Test in Europe (DATE)
Referenz:

Dresden, Germany, 2018
Hyperlink:

[Link zur Konferenz]



» Improved Synthesis of Clifford+T Quantum Functionality




Autor:

Philipp Niemann, Robert Wille, Rolf Drechsler
Konferenz:
Design, Automation and Test in Europe (DATE)
Referenz:

Dresden, Germany, 2018
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]



» Resiliency Evaluation via Symbolic Fault Injection on Intermediate Code




Autor:

Hoang M. Le, Vladimir Herdt, Daniel Große, Rolf Drechsler
Konferenz:
Design, Automation and Test in Europe (DATE)
Referenz:

Dresden, Germany, 2018
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]



» Towards Fully Automated TLM-to-RTL Property Refinement




Autor:

Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Konferenz:
Design, Automation and Test in Europe (DATE)
Referenz:

Dresden, Germany, 2018
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]



» Testbench Qualification for SystemC-AMS Timed Data Flow Models




Autor:

Muhammad Hassan, Daniel Große, Hoang M. Le, Thilo Vörtler, Karsten Einwich, Rolf Drechsler
Konferenz:
Design, Automation and Test in Europe (DATE)
Referenz:

Dresden, Germany, 2018
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]



» Approximate Hardware Generation using Symbolic Computer Algebra employing Gröbner Basis




Autor:

Saman Fröhlich, Daniel Große, Rolf Drechsler
Konferenz:
Design, Automation and Test in Europe (DATE)
Referenz:

Dresden, Germany, 2018
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]



» An Exact Method for Design Exploration of Quantum-dot Cellular Automata




Autor:

Marcel Walter, Robert Wille, Daniel Große, Frank Sill Torres, Rolf Drechsler
Konferenz:
Design, Automation and Test in Europe (DATE)
Referenz:

Dresden, Germany, 2018
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]




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