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Home « Team « Publikationen
» Publikationen von
Gerhard W. Dueck
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BÜCHER |
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BUCHBEITRÄGE |
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ZEITSCHRIFTEN |
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» Debugging Reversible Circuits
[Link zur Zeitschriften-Homepage]
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Autor:
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Robert Wille, Daniel Große, Stefan Frehse, Gerhard W. Dueck, Rolf Drechsler |
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INTEGRATION, the VLSI Journal |
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Volume 44, Number 1, pp. 51-61, JanuaryDOI: 10.1016/j.vlsi.2010.08.002 |
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2011
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» Exact Synthesis of Elementary Quantum Gate Circuits
[Link zur Zeitschriften-Homepage]
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Autor:
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Daniel Große, Robert Wille, Gerhard W. Dueck, Rolf Drechsler |
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Multiple-Valued Logic and Soft Computing |
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Volume 15, Number 4, pp. 283-300 |
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2009
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» Exact Multiple Control Toffoli Network Synthesis with SAT Techniques
[Link zur Zeitschriften-Homepage]
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Autor:
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Daniel Große, Robert Wille, Gerhard W. Dueck, Rolf Drechsler |
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IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems |
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Volume 28, Number 5, pp. 703-715, MayDOI: 10.1109/TCAD.2009.2017215 |
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2009
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KONFERENZEN |
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» Synthesizing Multiplier in Reversible Logic
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Autor:
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Sebastian Offermann, Robert Wille, Gerhard W. Dueck, Rolf Drechsler |
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13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS) |
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| pp. 335-340, Vienna, 2010
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| [Link zur Konferenz]
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» Window Optimization of Reversible and Quantum Circuits
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Autor:
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Mathias Soeken, Robert Wille, Gerhard W. Dueck, Rolf Drechsler |
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13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS) |
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| pp. 431-435, Vienna, 2010
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| [Link zur Konferenz]
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» Synthesizing Reversible Circuits for Irreversible Functions
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Autor:
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D. Michael Miller, Robert Wille, Gerhard W. Dueck |
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Euromicro Conference on Digital System Design (DSD) |
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| pp. 749-756, Patras, 2009
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| [Link zur Konferenz]
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» Debugging of Toffoli Networks
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Autor:
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Robert Wille, Daniel Große, Stefan Frehse, Gerhard W. Dueck, Rolf Drechsler
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Design, Automation and Test in Europe (DATE) |
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| pp. 1284-1289, Nice, 2009
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| [Link zur Konferenz]
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» Reversible Logic Synthesis with Output Permutation
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Autor:
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Robert Wille, Daniel Große, Gerhard W. Dueck, Rolf Drechsler |
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22nd International Conference on VLSI Design |
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| pp. 189-194, New Delhi, 2009
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| [Link zur Konferenz]
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» RevLib: An Online Resource for
Reversible Functions and Reversible Circuits
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Autor:
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Robert Wille, Daniel Große, Lisa Teuber, Gerhard W. Dueck, Rolf Drechsler |
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38th International Symposium on Multiple-Valued Logic 2008 (ISMVL '08) |
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| pp. 220-225, Dallas, 2008
RevLib is available at www.revlib.org
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| [Link zur Konferenz]
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» Exact Synthesis of Elementary Quantum Gate
Circuits for Reversible Functions with Don’t Cares
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Autor:
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Daniel Große, Robert Wille, Gerhard W. Dueck, Rolf Drechsler |
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38th International Symposium on Multiple-Valued Logic 2008 (ISMVL '08) |
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| pp. 214-219, Dallas, 2008
Received IEEE Young Researcher Award
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» Quantified Synthesis of Reversible Logic
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Autor:
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Robert Wille, Hoang M. Le, Gerhard W. Dueck, Daniel Große |
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Design, Automation, and Test in Europe (DATE) |
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| pp. 1015-1020, Munich, 2008
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| [Link zur Konferenz]
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» Exact SAT-based Toffoli Network Synthesis
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Autor:
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Daniel Große, Xiaobo Chen, Gerhard W. Dueck, Rolf Drechsler |
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Great Lakes Symposium on VLSI (GLSVLSI) |
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| pp. 96-101, Stresa, 2007
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| [Link zur Konferenz]
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WORKSHOPS |
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» Synthesising Reversible Circuits from Irreversible Specifications using Reed-Muller Spectral Techniques
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Autor:
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D. Michael Miller, Gerhard W. Dueck, Robert Wille |
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Reed-Muller Workshop |
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| Naha, Okinawa, 2009
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| [Link zum Workshop]
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» Reversible Logic Synthesis with Output Permutation
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Autor:
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Robert Wille, Daniel Große, Gerhard W. Dueck, Rolf Drechsler |
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International Workshop on Boolean Problems |
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| Freiberg, 2008
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| [Link zum Workshop]
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