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Universität Bremen Universität Bremen Fachbereich 3 Informatik
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» Publikationen von Jannis Stoppe


BÜCHER

» Computer: Wie funktionieren Smartphone, Tablet & Co.?
[Lesen Sie hier mehr!]



Verlag:


Springer
Autor:

Rolf Drechsler, Andrea Fink, Jannis Stoppe
Format:
Taschenbuch
Erscheinungsjahr:


2017




BUCHBEITRÄGE


ZEITSCHRIFTEN

» Analyzing SystemC Designs: SystemC Analysis Approaches for Varying Applications
[Link zur Zeitschriften-Homepage]




Autor:

Jannis Stoppe, Rolf Drechsler
Zeitschrift:
Sensors
Details:
Volume (issue) 15(5), pages 10399-10421
Jahr:


2015





KONFERENZEN


» Automatic Protocol Compliance Checking of SystemC TLM-2.0 Simulation Behavior Using Timed Automata




Autor:

Mehran Goli, Jannis Stoppe, Rolf Drechsler
Konferenz:
35th IEEE International Conference on Computer Design (ICCD)
Referenz:

Boston Area, Massachusetts, USA, 2017
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» Semi-Formal Cycle-Accurate Temporal Execution Traces Reconstruction




Autor:

Rehab Massoud, Jannis Stoppe, Daniel Große, Rolf Drechsler
Konferenz:
15th International Conference on Formal Modelling and Analysis of Timed Systems (FORMATS)
Referenz:

Berlin, Germany, 2017
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» BioViz: An Interactive Visualization Engine for Digital Microfluidic Biochips




Autor:

Jannis Stoppe, Oliver Keszöcze, Maximilian Luenert, Robert Wille, Rolf Drechsler
Konferenz:
IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Referenz:

Bochum, Germany, 2017
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» Effects of Cell Shapes on the Routability of Digital Microfluidic Biochips




Autor:

Kevin Leonard Schneider, Oliver Keszöcze, Jannis Stoppe, Rolf Drechsler
Konferenz:
Design, Automation and Test in Europe (DATE)
Referenz:

Lausanne, Switzerland, 2017
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» Automatic Equivalence Checking for SystemC-TLM 2.0 Models Against their Formal Specifications




Autor:

Mehran Goli, Jannis Stoppe, Rolf Drechsler
Konferenz:
Design, Automation and Test in Europe (DATE)
Referenz:

Lausanne, Switzerland, 2017
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» AIBA: an Automated Intra-Cycle Behavioral Analysis for SystemC-based Design Exploration




Autor:

Mehran Goli, Jannis Stoppe, Rolf Drechsler
Konferenz:
IEEE International Conference on Computer Design (ICCD)
Referenz:

Phoenix, USA, 2016
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» Hardware/Software Co-Visualization on the Electronic System Level using SystemC




Autor:

Rolf Drechsler, Jannis Stoppe
Konferenz:
International Conference on VLSI Design
Referenz:

Kolkata, India, 2016
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» Verification-driven Design Across Abstraction Levels - A Case Study




Autor:

Nils Przigoda, Jannis Stoppe, Julia Seiter, Robert Wille, Rolf Drechsler
Konferenz:
Euromicro Conference on Digital System Design (DSD)
Referenz:

Funchal, Madeira, Portugal, 2015
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» Automated Feature Localization for Dynamically Generated SystemC Designs




Autor:

Jannis Stoppe, Robert Wille, Rolf Drechsler
Konferenz:
Design, Automation and Test in Europe (DATE'15)
Referenz:

Grenoble, France, 2015
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» Validating SystemC Implementations Against Their Formal Specifications




Autor:

Jannis Stoppe, Robert Wille, Rolf Drechsler
Konferenz:
Symposium on Integrated Circuits and System Design (SBCCI)
Referenz:

Aracaju, Brazil, 2014
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» RevVis: Visualization of Structures and Properties in Reversible Circuits




Autor:

Robert Wille, Jannis Stoppe, Eleonora Schönborn, Kamalika Datta, Rolf Drechsler
Konferenz:
Reversible Computation
Referenz:

Kyoto, Japan, 2014
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» Cone of Influence Analysis at the Electronic System Level Using Machine Learning




Autor:

Jannis Stoppe, Robert Wille, Rolf Drechsler
Konferenz:
Euromicro Conference on Digital System Design (DSD)
Referenz:

Santander, Spain, 2013
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» Data Extraction from SystemC Designs using Debug Symbols and the SystemC API




Autor:

Jannis Stoppe, Robert Wille, Rolf Drechsler
Konferenz:
IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Referenz:

Natal, Brazil, 2013
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


WORKSHOPS


» Making Waveforms Great Again




Autor:

Jannis Stoppe and Rolf Drechsler
Workshop:
4th Workshop on Design Automation for Understanding Hardware Designs (DUHDe)
Referenz:

Lausanne, Switzerland, 2017
Hyperlink:

[Link zum Workshop]


» Verilog2GEXF - Dynamic Large Scale Circuit Visualization




Autor:

Kenneth Schmitz, Jannis Stoppe, Rolf Drechsler
Workshop:
4th Workshop on Design Automation for Understanding Hardware Designs (DUHDe)
Referenz:

Lausanne, Switzerland, 2017
Hyperlink:

[Link zum Workshop]


» Der Einfluss von Zellformen auf das Routing von Digital Microfluidic Biochips




Autor:

Leonard Schneider, Oliver Keszöcze, Jannis Stoppe, Rolf Drechsler
Workshop:
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
Referenz:

Bremen, Germany, 2017
Hyperlink:

[Link zum Workshop]


» SystemCDG - AI Based Coverage Driven Stimuli Generation for SystemC




Autor:

Jannis Stoppe, Arved Friedemann, Rolf Drechsler
Workshop:
International Workshop on Logic & Synthesis (IWLS)
Referenz:

Austin, TX, USA, 2016
Hyperlink:

[Link zum Workshop]


» Change Management for Hardware Designers




Autor:

Martin Ring, Jannis Stoppe, Christoph Lüth, Rolf Drechsler
Workshop:
Workshop on Design Automation for Understanding Hardware Designs (DUHDE)
Referenz:

Dresden, Germany, 2016
Hyperlink:

[Link zum Workshop]


» Visualizing Microfluidic Biochips Interactively




Autor:

Jannis Stoppe, Oliver Keszöcze, Robert Wille, Rolf Drechsler
Workshop:
Workshop on Design Automation for Understanding Hardware Designs (DUHDE)
Referenz:

Dresden, Germany, 2016
Hyperlink:

[Link zum Workshop]


» Ecore Model Generation from SystemC/C++ Implementations




Autor:

Jannis Stoppe, Rolf Drechsler
Workshop:
DATE Friday Workshop: Design Automation for Understanding Hardware Designs (DUHDe)
Referenz:

Grenoble, France, 2015
Hyperlink:

[Link zum Workshop]


» Towards a Multi-dimensional and Dynamic Visualization for ESL Designs




Autor:

Jannis Stoppe, Marc Michael, Mathias Soeken, Robert Wille, Rolf Drechsler
Workshop:
DATE Friday Workshop: Design Automation for Understanding Hardware Designs
Referenz:

Dresden, Germany, 2014
Hyperlink:

[Link zum Workshop]

















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