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» Publikationen von Nils Przigoda


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ZEITSCHRIFTEN

» Towards a Verification Flow Across Abstraction Levels:
Verifying Implementations Against Their Formal Specification

[Link zur Zeitschriften-Homepage]




Autor:

Pablo Gonzalez-de-Aledo, Nils Przigoda, Robert Wille, Rolf Drechsler, Pablo Sanchez
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
36(3):475-488, DOI: 10.1109/TCAD.2016.2611494
Jahr:


2017




» Verifying the Structure and Behavior in UML/OCL Models Using Satisfiability Solvers
[Link zur Zeitschriften-Homepage]




Autor:

Nils Przigoda, Mathias Soeken, Robert Wille, Rolf Drechsler
Zeitschrift:
IET Cyber-Physical Systems: Theory & Applications
Details:
Volume 1, Issue 1, December 2016, pp. 49-59
DOI: 10.1049/iet-cps.2016.0022
Jahr:


2016




» Analyzing Inconsistencies in UML/OCL Models
[Link zur Zeitschriften-Homepage]




Autor:

Nils Przigoda, Robert Wille, Rolf Drechsler
Zeitschrift:
Journal of Circuits, Systems and Computers
Details:
Volume 25, Issue 03, March 2016
DOI: 10.1142/S0218126616400211
Jahr:


2016




» Effect of Negative Control Lines on the Exact Synthesis of Reversible Circuits
[Link zur Zeitschriften-Homepage]




Autor:

Robert Wille, Mathias Soeken, Nils Przigoda, Rolf Drechsler
Zeitschrift:
Multiple-Valued Logic and Soft Computing
Details:
Volume 21, Number 5-6, 2013, pp. 627-640
Jahr:


2013





KONFERENZEN


» More than true or false: Native Support of Irregular Values in the Automatic Validation & Verification of UML/OCL Models




Autor:

Nils Przigoda, Philipp Niemann, Judith Peters, Frank Hilken, Robert Wille, Rolf Drechsler
Konferenz:
15th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE)
Referenz:

Vienna, Austria, 2017
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» Clocks vs. Instants Relations: Verifying CCSL Time Constraints in UML/MARTE Models




Autor:

Judith Peters, Nils Przigoda, Robert Wille, Rolf Drechsler
Konferenz:
14th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE)
Referenz:

Indian Institute of Technology, Kanpur, India, 2016
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» Frame Conditions in Symbolic Representations of UML/OCL Models




Autor:

Nils Przigoda, Jonas Gomes Filho, Philipp Niemann, Robert Wille, Rolf Drechsler
Konferenz:
14th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE)
Referenz:

Indian Institute of Technology, Kanpur, India, 2016
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» Towards a Model-Based Verification Methodology for Complex Swarm Systems




Autor:

Jonas Gomes Filho, Nils Przigoda, Robert Wille, Rolf Drechsler
Konferenz:
International Symposium on Electronic System Design (ISED)
Referenz:

Patna, Indien, 2016
Hyperlink:

[Link zur Konferenz]


» Ground Setting Properties for an Efficient Translation of OCL in SMT-based Model Finding




Autor:

Nils Przigoda, Robert Wille, Rolf Drechsler
Konferenz:
ACM/IEEE 19th International Conference on Model Driven Engineering Languages and Systems (MoDELS)
Referenz:

Saint Malo, Brittany, France, 2016
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» Fault Detection in Parity Preserving Reversible Circuits




Autor:

Nils Przigoda, Gerhard Dueck, Robert Wille, Rolf Drechsler
Konferenz:
46th International Symposium on Multiple-Valued Logic (ISMVL)
Referenz:

Sapporo, Japan, 2016
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» Checking Concurrent Behavior in UML/OCL Models




Autor:

Nils Przigoda, Christoph Hilken, Robert Wille, Jan Peleska, Rolf Drechsler
Konferenz:
ACM/IEEE 18th International Conference on Model Driven Engineering Languages and Systems (MoDELS)
Referenz:

Ottawa, Kanada, 2015
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» Leveraging the Analysis for Invariant Independence in Formal System Models




Autor:

Nils Przigoda, Robert Wille, Rolf Drechsler
Konferenz:
Euromicro Conference on Digital System Design (DSD)
Referenz:

Funchal, Madeira, Portugal, 2015
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» Verification-driven Design Across Abstraction Levels - A Case Study




Autor:

Nils Przigoda, Jannis Stoppe, Julia Seiter, Robert Wille, Rolf Drechsler
Konferenz:
Euromicro Conference on Digital System Design (DSD)
Referenz:

Funchal, Madeira, Portugal, 2015
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» Contradiction Analysis for Inconsistent Formal Models




Autor:

Nils Przigoda, Robert Wille, Rolf Drechsler
Konferenz:
IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS'15)
Referenz:

Belgrade, Serbia, 2015
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» A Generic Representation of CCSL Time Constraints for UML/MARTE Models




Autor:

Judith Peters, Robert Wille, Nils Przigoda, Ulrich Kühne, Rolf Drechsler
Konferenz:
Design Automation Conference (DAC)
Referenz:

San Francisco, 2015
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» A Compact and Efficient SAT Encoding for Quantum Circuits




Autor:

Robert Wille, Nils Przigoda, Rolf Drechsler
Konferenz:
IEEE Africon
Referenz:

Mauritius, 2013
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» Exact Synthesis of Toffoli Gate Circuits with Negative Control Lines




Autor:

Robert Wille, Mathias Soeken, Nils Przigoda, Rolf Drechsler
Konferenz:
42nd International Symposium on Multiple-Valued Logic (ISMVL)
Referenz:

pp. 69-74, Victoria, Canada, 2012
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


» Synthesis of Reversible Circuits with Minimal Lines for Large Functions




Autor:

Mathias Soeken, Robert Wille, Christoph Hilken, Nils Przigoda, Rolf Drechsler
Konferenz:
Asia and South Pacific Design Automation Conference (ASP-DAC)
Referenz:

pp. 85-92, Sydney, 2012
Hyperlink:

[Link zur Konferenz]
PDF:

[hier ansehen]


WORKSHOPS


» Integrating an SMT-based Model Finder into USE




Autor:

Nils Przigoda, Frank Hilken, Judith Peters, Robert Wille, Martin Gogolla, Rolf Drechsler
Workshop:
Workshop on Model-Driven Engineering, Verification, and Validation (MoDeVVa)
Referenz:

Saint-Malo, France, 2016
Hyperlink:

[Link zum Workshop]


» Towards an Automatic Approach for Restricting UML/OCL Invariability Clauses




Autor:

Nils Przigoda, Judith Peters, Mathias Soeken, Robert Wille, Rolf Drechsler
Workshop:
Workshop on Model-Driven Engineering, Verification, and Validation (MoDeVVa)
Referenz:

Ottawa, Canada, 2015
Hyperlink:

[Link zum Workshop]


» Verbesserung der Fehlersuche in inkonsistenten formalen Modellen




Autor:

Nils Przigoda, Robert Wille, Rolf Drechsler
Workshop:
18. ITG/GMM/GI-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV'15)
Referenz:

Chemnitz, Germany, 2015
Hyperlink:

[Link zum Workshop]


» Synthesis of Reversible Circuits with Minimal Lines for Large Functions




Autor:

Mathias Soeken, Robert Wille, Christoph Hilken, Nils Przigoda, Rolf Drechsler
Workshop:
Workshop on Reversible Computation
Referenz:

pp. 59-70, Gent, 2011
Hyperlink:

[Link zum Workshop]

















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