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» Using Word-Level Information in Formal Hardware Verification
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Using Word-Level Information in Formal Hardware Verification





Autor:

Rolf Drechsler
Zeitschrift:
Automation and Remote Control
Details:
Jahr:


Volume 65, Issue 6, pp. 963-977, June 2004






» A PLiM computer for the IoT
[Link zur Zeitschriften-Homepage]







Autor:

Mathias Soeken, Pierre-Emmanuel Gaillardon, Saeideh Shirinzadeh, Rolf Drechsler, Giovanni De Micheli
Zeitschrift:
Computer
Details:
50(6):35-40, DOI: 10.1109/MC.2017.173
Jahr:


2017






» An Energy-aware Model for the Logic Synthesis of Quantum-Dot Cellular Automata
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: An Energy-aware Model for the Logic Synthesis of Quantum-Dot Cellular Automata





Autor:

Frank Sill Torres, Robert Wille, Philipp Niemann, Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
accepted
Jahr:


2017






» Frame Conditions in the Automatic Validation and Verification of UML/OCL Models: A Symbolic Formulation of modifies only Statements
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Frame Conditions in the Automatic Validation and Verification of UML/OCL Models: A Symbolic Formulation of modifies only Statements





Autor:

Nils Przigoda, Philipp Niemann, Jonas Gomes Filho, Robert Wille, Rolf Drechsler
Zeitschrift:
Computer Languages, Systems & Structures
Details:
accepted
Jahr:


2017






» Logic synthesis for RRAM-based in-memory computing
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Logic synthesis for RRAM-based in-memory computing





Autor:

Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Details:
accepted
Jahr:


2017






» metaSMT: Focus On Your Application And Not On Solver Integration
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: metaSMT: Focus On Your Application And Not On Solver Integration





Autor:

Heinz Riener, Finn Haedicke, Stefan Frehse, Mathias Soeken, Daniel Große, Rolf Drechsler, Görschwin Fey
Zeitschrift:
International Journal of Software Tools for Technology Transfer
Details:
19(5):605-621, DOI10.1007/s10009-016-0426-1 Link
Jahr:


2017






» Synthesis of optical circuits using binary decision diagrams
[Link zur Zeitschriften-Homepage]







Autor:

Arighna Deb, Robert Wille, Oliver Keszöcze, Saeideh Shirinzadeh, Rolf Drechsler
Zeitschrift:
Integration, the VLSI Journal
Details:
Volume 59, September 2017, Pages 42–51
Jahr:


2017






» Towards a Verification Flow Across Abstraction Levels:
Verifying Implementations Against Their Formal Specification

[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Towards a Verification Flow Across Abstraction Levels:<br />
Verifying Implementations Against Their Formal Specification





Autor:

Pablo Gonzalez-de-Aledo, Nils Przigoda, Robert Wille, Rolf Drechsler, Pablo Sanchez
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
36(3):475-488, DOI: 10.1109/TCAD.2016.2611494
Jahr:


2017






» Analyzing Inconsistencies in UML/OCL Models
[Link zur Zeitschriften-Homepage]







Autor:

Nils Przigoda, Robert Wille, Rolf Drechsler
Zeitschrift:
Journal of Circuits, Systems and Computers
Details:
Volume 25, Issue 03, March 2016
DOI: 10.1142/S0218126616400211
Jahr:


2016






» Complexity of Reversible Circuits and their Quantum Implementations
[Link zur Zeitschriften-Homepage]







Autor:

Nabila Abdessaied, Matthew Amy, Rolf Drechsler, Mathias Soeken
Zeitschrift:
Theoretical Computer Science
Details:
Volume 618, (March 2016), pp. 85–106. DOI:10.1016/j.tcs.2016.01.011
Jahr:


2016






» Debugging hardware designs using dynamic dependency graphs
[Link zur Zeitschriften-Homepage]







Autor:

Jan Malburg, Alexander Finder, Görschwin Fey
Zeitschrift:
Microprocessors and Microsystems (MICPRO)
Details:
accepted, DOI: 10.1016/j.micpro.2016.10.004 Link
Jahr:


2016






» Empirical Results on Parity-based Soft Error Detection with Software-based Retry
[Link zur Zeitschriften-Homepage]







Autor:

Gökçe Aydos, Görschwin Fey
Zeitschrift:
Microprocessors and Microsystems (MICPRO)
Details:
accepted, http://dx.doi.org/10.1016/j.micpro.2016.09.009
Jahr:


2016






» Gates vs. Splitters: Contradictory Optimization Objectives in the Synthesis of Optical Circuits
[Link zur Zeitschriften-Homepage]







Autor:

Arighna Deb, Robert Wille, Oliver Keszöcze, Stefan Hillmich, Rolf Drechsler
Zeitschrift:
Journal on Emerging Technologies in Computing Systems (JETC)
Details:
Volume 13, Issue 1
Jahr:


2016






» On Optimization-based ATPG and its Application for Highly Compacted Test Sets
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: On Optimization-based ATPG and its Application for Highly Compacted Test Sets





Autor:

Stephan Eggersglüß, Kenneth Schmitz, Rene Krenz-Baath, Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Vol. 35(12), pp. 2104-2117
Jahr:


2016






» Online collaborative learning in dyads: Effects of knowledge distribution and awareness
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Online collaborative learning in dyads: Effects of knowledge distribution and awareness





Autor:

Michail D. Kozlov, Cornelia Große
Zeitschrift:
Computers in Human Behavior
Details:
Volume 59, 389-401
Jahr:


2016






» QMDDs: Efficient Quantum Function Representation and Manipulation
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: QMDDs: Efficient Quantum Function Representation and Manipulation





Autor:

Philipp Niemann, Robert Wille, D. Michael Miller, Mitchell A. Thornton, Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 35, Number 1, pp. 86-99
DOI: 10.1109/TCAD.2015.2459034
Jahr:


2016






» Reversible Synthesis of Symmetric Functions with a Simple Regular Structure and Easy Testability
[Link zur Zeitschriften-Homepage]







Autor:

Arighna Deb, Debesh K. Das, Hafizur Rahaman, Robert Wille, Rolf Drechsler, Bhargab B. Bhattacharya
Zeitschrift:
Journal on Emerging Technologies in Computing Systems (JETC)
Details:
Volume 12 Issue 4, Article No. 34
Jahr:


2016






» SyReC: A Hardware Description Language for the Specification and Synthesis of Reversible Circuits
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: SyReC: A Hardware Description Language for the Specification and Synthesis of Reversible Circuits





Autor:

Robert Wille, Eleonora Schonborn, Mathias Soeken, Rolf Drechsler
Zeitschrift:
INTEGRATION, the VLSI Journal
Details:
53(3):39-53
Jahr:


2016






» Time-resolved detection of diffusion limited temperature gradients inside single isolated burning droplets using Rainbow Refractometry
[Link zur Zeitschriften-Homepage]







Autor:

Christopher Rosebrock, Saeideh Shirinzadeh, Mathias Soeken, Norbert Riefler, Thomas Wriedt, Rolf Drechsler, Lutz Mädler
Zeitschrift:
Combustion and Flame
Details:
Volume 168, June 2016, Pages 255–269
Jahr:


2016






» Verifying the Structure and Behavior in UML/OCL Models Using Satisfiability Solvers
[Link zur Zeitschriften-Homepage]







Autor:

Nils Przigoda, Mathias Soeken, Robert Wille, Rolf Drechsler
Zeitschrift:
IET Cyber-Physical Systems: Theory & Applications
Details:
Volume 1, Issue 1, December 2016, pp. 49-59
DOI: 10.1049/iet-cps.2016.0022
Jahr:


2016






» Analyzing SystemC Designs: SystemC Analysis Approaches for Varying Applications
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Analyzing SystemC Designs: SystemC Analysis Approaches for Varying Applications





Autor:

Jannis Stoppe, Rolf Drechsler
Zeitschrift:
Sensors
Details:
Volume (issue) 15(5), pages 10399-10421
Jahr:


2015






» Ancilla-free synthesis of large reversible functions using binary decision diagrams
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Ancilla-free synthesis of large reversible functions using binary decision diagrams





Autor:

Mathias Soeken, Laura Tague, Gerhard W. Dueck, Rolf Drechsler
Zeitschrift:
Journal of Symbolic Computation
Details:
accepted, preprint available at arXiv 1408.3955
Jahr:


2015






» Atomic distributions in crystal structures solved by Boolean satisfiability techniques
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Atomic distributions in crystal structures solved by Boolean satisfiability techniques





Autor:

Mathias Soeken, Rolf Drechsler, Reinhard X. Fischer
Zeitschrift:
Zeitschrift für Kristallographie - Crystalline Materials
Details:
Z. Kristallogr. 2016; 231(2): 107–111
Jahr:


2015






» Benefits of illustrations and videos for technical documentations
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Benefits of illustrations and videos for technical documentations





Autor:

Cornelia Große, Lisa Jungmann, Rolf Drechsler
Zeitschrift:
Computers in Human Behavior
Details:
Volume 45, April 2015, Pages 109–120
DOI: 10.1016/j.chb.2014.11.095
Jahr:


2015






» Embedding of Large Boolean Functions for Reversible Logic
[Link zur Zeitschriften-Homepage]







Autor:

Mathias Soeken, Robert Wille, Oliver Keszöcze, D. Michael Miller, Rolf Drechsler
Zeitschrift:
Journal on Emerging Technologies in Computing Systems (JETC)
Details:
Volume 12, Issue 4
Preprint available at arXiv 1408.3586
Jahr:


2015






» Incorporating User Preferences in Many-Objective Optimization using Relation epsilon-Preferred
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Incorporating User Preferences in Many-Objective Optimization using Relation epsilon-Preferred





Autor:

Nicole Drechsler, André Sülflow, Rolf Drechsler
Zeitschrift:
Natural Computing
Details:
Volume 14, Issue 3, pp 469-483
Jahr:


2015






» Scalable One-Pass Synthesis for Digital Microfluidic Biochips
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Scalable One-Pass Synthesis for Digital Microfluidic Biochips





Autor:

Robert Wille, Oliver Keszöcze, Tobias Boehnisch, Alexander Kroker, Rolf Drechsler
Zeitschrift:
IEEE Design & Test of Computers
Details:
Volume 32, Issue 66, Pages 41—50
Jahr:


2015






» Transaction-based online debug for NoC-based multiprocessor SoCs
[Link zur Zeitschriften-Homepage]







Autor:

Mehdi Dehbashi, Görschwin Fey
Zeitschrift:
Microprocessors and Microsystems (MICPRO)
Details:
39(3): 157-166
Jahr:


2015






» A Simulation Based Approach for Automated Feature Localization
[Link zur Zeitschriften-Homepage]







Autor:

Jan Malburg, Alexander Finder, Görschwin Fey
Zeitschrift:
IEEE Trans. on CAD of Integrated Circuits and Systems
Details:
Volume:33, Issue: 12, Pages 1886-1899 DOI: 10.1109/TCAD.2014.2360462 Link
Jahr:


2014






» An effective fault ordering heuristic for SAT-based dynamic test compaction techniques
[Link zur Zeitschriften-Homepage]







Autor:

Stephan Eggersglüß, Rolf Drechsler
Zeitschrift:
it-Information Technology
Details:
Volume 56, Number 4, pp. 157-164
Special Issue
Jahr:


2014






» Dynamic X-filling for Peak Capture Power Reduction for Compact Test Sets







Autor:

Stephan Eggersglüß
Zeitschrift:
Journal of Electronic Testing: Theory and Applications
Details:
Volume 30, Number 5, pp. 557-567
Jahr:


2014






» Exact Reordering of Circuit Lines for Nearest Neighbor Quantum Architectures
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Exact Reordering of Circuit Lines for Nearest Neighbor Quantum Architectures





Autor:

Robert Wille, Aaron Lye, Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 33, Number 12, pp. 1818-1831
DOI: 10.1109/TCAD.2014.2356463
Jahr:


2014






» Finite controlled invariants for sampled switched systems
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Finite controlled invariants for sampled switched systems





Autor:

Laurent Fribourg, Ulrich Kühne, Romain Soulat
Zeitschrift:
Formal Methods in System Design
Details:
online, DOI: 10.1007/s10703-014-0211-2
Jahr:


2014






» Latency Analysis for Sequential Circuits







Autor:

Alexander Finder, André Sülflow, Görschwin Fey
Zeitschrift:
IEEE Trans. on CAD of Integrated Circuits and Systems
Details:
Volume 33, Number 4, pp. 643-647, DOI: 10.1109/TCAD.2013.2292501
Jahr:


2014






» Learning to solve story problems – supporting transitions between reality and mathematics
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Learning to solve story problems – supporting transitions between reality and mathematics





Autor:

Cornelia Große
Zeitschrift:
European Journal of Psychology of Education
Details:
Volume 29, Number 4, pp 619-634. DOI: 10.1007/s10212-014-0217-6
Jahr:


2014






» Mathematics learning with multiple solution methods: effects of types of solutions and learners’ activity
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Mathematics learning with multiple solution methods: effects of types of solutions and learners’ activity





Autor:

Cornelia Große
Zeitschrift:
Instructional Science
Details:
Volume 42, Number 5, pp 715-745. DOI: 10.1007/s11251-014-9312-y
Jahr:


2014






» Special Issue on Reversible Computation
[Link zur Zeitschriften-Homepage]







Autor:

Robert Wille, Rolf Drechsler, Mehdi . B. Tahoori (editors)
Zeitschrift:
Journal on Emerging Technologies in Computing Systems (JETC)
Details:
Volume 11, Number 2
Jahr:


2014






» Testing integrated circuits
[Link zur Zeitschriften-Homepage]







Autor:

Rolf Drechsler
Zeitschrift:
it-Information Technology
Details:
Volume 56, Number 4, pp. 148-149
Special Issue
Jahr:


2014






» Trading Off Circuit Lines and Gate Costs in the Synthesis of Reversible Logic
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Trading Off Circuit Lines and Gate Costs in the Synthesis of Reversible Logic





Autor:

Robert Wille, Mathias Soeken, D. Michael Miller, Rolf Drechsler
Zeitschrift:
INTEGRATION, the VLSI Journal
Details:
Volume 47, Number 2, pp. 284-294, DOI: 10.1016/j.vlsi.2013.08.002
Jahr:


2014






» Upper bounds for reversible circuits based on Young subgroups
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Upper bounds for reversible circuits based on Young subgroups





Autor:

Nabila Abdessaied, Mathias Soeken, Michael Kirkedal Thomsen, Rolf Drechsler
Zeitschrift:
Information Processing Letters
Details:
Volume 114, Number 06 (June 2014), pp. 282-286. DOI: 10.1016/j.ipl.2014.01.003
Jahr:


2014






» Search-based testing using constraint-based mutation
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Search-based testing using constraint-based mutation





Autor:

Jan Malburg, Gordon Fraser
Zeitschrift:
Software Testing, Verification and Reliability
Details:
Volume 24, Issue 6, pages 472–495, September 2014, DOI: 10.1002/stvr.1508 Link
Jahr:


2013 (online)






» A Formal Model for Embedded Brain Reading
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: A Formal Model for Embedded Brain Reading





Autor:

Elsa Andrea Kirchner, Rolf Drechsler
Zeitschrift:
Industrial Robot: an International Journal
Details:
Volume 40, Issue 6, pp. 530-540
Jahr:


2013






» Automated Design Debugging in a Testbench-Based Verification Environment
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Automated Design Debugging in a Testbench-Based Verification Environment





Autor:

Mehdi Dehbashi, André Sülflow, Görschwin Fey
Zeitschrift:
Embedded Hardware Design - Microprocessors and Microsystems (MICPRO)
Details:
Volume 37, Issue 2, pp. 206-217
Jahr:


2013






» Considering Nearest Neighbor Constraints of Quantum Circuits at the Reversible Circuit Level


Großformat der Zeitschrift: Considering Nearest Neighbor Constraints of Quantum Circuits at the Reversible Circuit Level





Autor:

Robert Wille, Aaron Lye, Rolf Drechsler
Zeitschrift:
Quantum Information Processing
Details:
DOI: http://dx.doi.org/10.1007/s11128-013-0642-5
Jahr:


2013






» Debug Automation for Logic Circuits Under Timing Variations
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Debug Automation for Logic Circuits Under Timing Variations





Autor:

Mehdi Dehbashi, Görschwin Fey
Zeitschrift:
IEEE Design & Test of Computers
Details:
Volume 30, Issue 6, pp. 60-69
Jahr:


2013






» Effect of Negative Control Lines on the Exact Synthesis of Reversible Circuits
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Effect of Negative Control Lines on the Exact Synthesis of Reversible Circuits





Autor:

Robert Wille, Mathias Soeken, Nils Przigoda, Rolf Drechsler
Zeitschrift:
Multiple-Valued Logic and Soft Computing
Details:
Volume 21, Number 5-6, 2013, pp. 627-640
Jahr:


2013






» Enhanced Formal Verification Flow for Circuits Integrating Debugging and Coverage Analysis







Autor:

Daniel Große, Görschwin Fey, Rolf Drechsler
Zeitschrift:
Electronic Communications of the EASST
Details:
Volume 62, 13 pages
Jahr:


2013






» High Efficiency Time Redundant Hardened Latch for Reliable Circuit Design
[Link zur Zeitschriften-Homepage]







Autor:

Rahebeh Niaraki Asli, Saeideh Shirinzadeh
Zeitschrift:
Journal of Electronic Testing
Details:
Volume 29, Issue 4, pp 537-544
Jahr:


2013






» Parametric Verification and Test Coverage for Hybrid Automata using the Inverse Method
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Parametric Verification and Test Coverage for Hybrid Automata using the Inverse Method





Autor:

Laurent Fribourg, Ulrich Kühne
Zeitschrift:
International Journal of Foundations of Computer Science (IJFCS)
Details:
Volume 24, Number 02 (February 2013), pp. 233-250
Jahr:


2013






» Quantum circuits employing roots of the Pauli matrices
[Link zur Zeitschriften-Homepage]







Autor:

Mathias Soeken, D. Michael Miller, Rolf Drechsler
Zeitschrift:
Physical Review A
Details:
Volume 88, 042322, 2013, DOI: 10.1103/PhysRevA.88.042322
Jahr:


2013






» Speci fication-Driven Model Transformation Testing
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Specification-Driven Model Transformation Testing





Autor:

Esther Guerra, Mathias Soeken
Zeitschrift:
Software and Systems Modeling
Details:
accepted
Jahr:


2013






» A Highly Fault-Efficient SAT-Based ATPG Flow
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: A Highly Fault-Efficient SAT-Based ATPG Flow





Autor:

Stephan Eggersglüß, Rolf Drechsler
Zeitschrift:
IEEE Design & Test of Computers
Details:
Volume 29, Issue 4 (July/August), pp. 63-70
Jahr:


2012






» Automatic TLM Fault Localization for SystemC
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Automatic TLM Fault Localization for SystemC





Autor:

Hoang M. Le, Daniel Große, Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 31, Number 8, pp. 1249-1262,
DOI: 10.1109/TCAD.2012.2188800
Jahr:


2012






» RevKit: A Toolkit for Reversible Circuit Design
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: RevKit: A Toolkit for Reversible Circuit Design





Autor:

Mathias Soeken, Stefan Frehse, Robert Wille, Rolf Drechsler
Zeitschrift:
Multiple-Valued Logic and Soft Computing
Details:
Volume 18, Number 1, pp. 55-65
Jahr:


2012






» RevKit: An Open Source Toolkit for the Design of Reversible Circuits
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: RevKit: An Open Source Toolkit for the Design of Reversible Circuits





Autor:

Mathias Soeken, Stefan Frehse, Robert Wille, Rolf Drechsler
Zeitschrift:
Reversible Computation 2011 (Series: Lecture Notes in Computer Science)
Details:
Volume 7165, Third International Workshop, RC 2011, Revised Papers, pp. 64-76
Jahr:


2012






» Special Issue on Reversible Computation
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Special Issue on Reversible Computation





Autor:

Rolf Drechsler, Irek Ulidowski, Robert Wille (editors)
Zeitschrift:
Multiple-Valued Logic and Soft Computing
Details:
Volume 18, Number 1
Jahr:


2012






» Debugging Reversible Circuits
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Debugging Reversible Circuits





Autor:

Robert Wille, Daniel Große, Stefan Frehse, Gerhard W. Dueck, Rolf Drechsler
Zeitschrift:
INTEGRATION, the VLSI Journal
Details:
Volume 44, Number 1, pp. 51-61, January
DOI: 10.1016/j.vlsi.2010.08.002
Jahr:


2011






» Effective Robustness Analysis using Bounded Model Checking Techniques
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Effective Robustness Analysis using Bounded Model Checking Techniques





Autor:

Görschwin Fey, André Sülflow, Stefan Frehse, Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 30, Number 8, pp. 1239-1252 DOI: 10.1109/TCAD.2011.2120950
Jahr:


2011






» Efficient Data Structures and Methodologies for SAT-based ATPG providing High Fault Coverage in Industrial Application
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Efficient Data Structures and Methodologies for SAT-based ATPG providing High Fault Coverage in Industrial Application





Autor:

Stephan Eggersglüß, Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 30, Number 9, pp. 1411-1415,
DOI: 10.1109/TCAD.2011.2152450
Jahr:


2011






» Synthesis of Quantum Circuits for Linear Nearest Neighbor Architectures
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Synthesis of Quantum Circuits for Linear Nearest Neighbor Architectures





Autor:

Mehdi Saeedi, Robert Wille, Rolf Drechsler
Zeitschrift:
Quantum Information Processing
Details:
Volume 10, Number 3, pp. 355-377
DOI: 10.1007/s11128-010-0201-2
Jahr:


2011






» Automatische formale Verifikation der Fehlertoleranz von Schaltkreisen
[Link zur Zeitschriften-Homepage]







Autor:

Görschwin Fey, Andre Sülflow, Stefan Frehse, Rolf Drechsler
Zeitschrift:
it-Information Technology
Details:
Volume 52, Number 4, pp. 216-223
PDF Download
Jahr:


2010






» BDD-Based Synthesis of Reversible Logic
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: BDD-Based Synthesis of Reversible Logic





Autor:

Robert Wille, Rolf Drechsler
Zeitschrift:
International Journal of Applied Metaheuristic Computing (IJAMC)
Details:
Volume 1, Number 4, pp. 25-41
Jahr:


2010






» Effect of BDD Optimization on Synthesis of Reversible and Quantum Logic
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Effect of BDD Optimization on Synthesis of Reversible and Quantum Logic





Autor:

Robert Wille, Rolf Drechsler
Zeitschrift:
Electronic Notes in Theoretical Computer Science
Details:
Volume 253, Number 6, pp. 57-70
DOI: 10.1016/j.entcs.2010.02.006
Jahr:


2010






» Incremental Solving Techniques for SAT-based ATPG
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Incremental Solving Techniques for SAT-based ATPG





Autor:

Daniel Tille, Stephan Eggersglüß, Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 29, Number 7, pp. 1125-1130, July
Jahr:


2010






» MONSOON: SAT-based ATPG for Path Delay Faults Using Multiple-Valued Logics
[Link zur Zeitschriften-Homepage]







Autor:

Stephan Eggersglüß, Görschwin Fey, Andreas Glowatz, Friedrich Hapke, Juergen Schloeffel, Rolf Drechsler
Zeitschrift:
Journal of Electronic Testing: Theory and Applications
Details:
Volume 26, Number 3 / June, pp. 307-322
Pdf download (Preliminary Version)
The final publication is available at www.springerlink.com
Jahr:


2010






» Synthese reversibler Logik
[Link zur Zeitschriften-Homepage]







Autor:

Robert Wille, Rolf Drechsler
Zeitschrift:
it-Information Technology
Details:
Volume 52, Number 1, pp. 30-38
PDF Download
Jahr:


2010






» Towards Fully Automatic Synthesis of Embedded Software
[Link zur Zeitschriften-Homepage]







Autor:

Ulrich Kühne, Daniel Große, Rolf Drechsler
Zeitschrift:
IEEE Embedded Systems Letters
Details:
Volume 2, Number 3, pp. 53-57, September
Jahr:


2010






» Advanced Verification by Automatic Property Generation
[Link zur Zeitschriften-Homepage]







Autor:

Frank Rogin, Thomas Klotz, Görschwin Fey, Rolf Drechsler, Steffen Rülke
Zeitschrift:
IET Computers & Digital Techniques
Details:
Volume 3, Issue 4, pp. 338-353, July
Jahr:


2009






» Effiziente Erfüllbarkeitsalgorithmen für die Generierung von Testmustern
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Effiziente Erfüllbarkeitsalgorithmen für die Generierung von Testmustern





Autor:

Rolf Drechsler, Stephan Eggersglüß, Görschwin Fey, Jürgen Schlöffel, Daniel Tille
Zeitschrift:
it - information technology
Details:
Volume 51, Number 2, pp. 102-111
Pdf download
Jahr:


2009






» Exact Multiple Control Toffoli Network Synthesis with SAT Techniques
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Exact Multiple Control Toffoli Network Synthesis with SAT Techniques





Autor:

Daniel Große, Robert Wille, Gerhard W. Dueck, Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 28, Number 5, pp. 703-715, May
DOI: 10.1109/TCAD.2009.2017215
Jahr:


2009






» Exact Synthesis of Elementary Quantum Gate Circuits
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Exact Synthesis of Elementary Quantum Gate Circuits





Autor:

Daniel Große, Robert Wille, Gerhard W. Dueck, Rolf Drechsler
Zeitschrift:
Multiple-Valued Logic and Soft Computing
Details:
Volume 15, Number 4, pp. 283-300
Jahr:


2009






» Overcoming the limitations of data introspection for SystemC
[Link zur Zeitschriften-Homepage]







Autor:

Christian Genz, Rolf Drechsler
Zeitschrift:
EDA Tech Forum
Details:
Volume 6, Issue 5, Pages 30-34 (December 2009)
Jahr:


2009






» Weighted A* search - unifying view and application
[Link zur Zeitschriften-Homepage]







Autor:

Rüdiger Ebendt, Rolf Drechsler
Zeitschrift:
Artificial Intelligence
Details:
Volume 173, Issue 15, Pages 1367-1456 (September 2009)
Jahr:


2009






» Analyzing Functional Coverage in Bounded Model Checking
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Analyzing Functional Coverage in Bounded Model Checking





Autor:

Daniel Große, Ulrich Kühne, Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 27, Number 7, pp. 1305-1314, July
Jahr:


2008






» Automatic Fault Localization for Property Checking
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Automatic Fault Localization for Property Checking





Autor:

Görschwin Fey, Stefan Staber, Roderick Bloem, Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 27, Number 6, pp. 1138-1149, June
Jahr:


2008






» Improved SAT-based Reachability Analysis with Observability Don’t Cares
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Improved SAT-based Reachability Analysis with Observability Don’t Cares





Autor:

Sean Safarpour, Andreas Veneris and Rolf Drechsler
Zeitschrift:
Journal on Satisfiability, Boolean Modeling and Computation (JSAT)
Details:
Volume 5, pp. 1-25, Special Volume on Application of Constraints to Formal Verification
Jahr:


2008






» Logic Minimization and Testability of 2-SPP Networks
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Logic Minimization and Testability of 2-SPP Networks





Autor:

Anna Bernasconi, Valentina Ciriani, Rolf Drechsler, Tiziano Villa
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 27, Number 7, pp. 1190-1202, July
Jahr:


2008






» Modeling and Proving Completeness in Formal Verification of Counting Heads
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Modeling and Proving Completeness in Formal Verification of Counting Heads





Autor:

Sebastian Kinder, Rolf Drechsler
Zeitschrift:
Software Tools for Technology Transfer (STTT)
Details:
Springer, Volume 10, Number 6, pp. 521 - 534
Jahr:


2008






» On Acceleration of SAT-based ATPG for Industrial Designs
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: On Acceleration of SAT-based ATPG for Industrial Designs





Autor:

Rolf Drechsler, Stephan Eggersglüß, Görschwin Fey, Andreas Glowatz, Friedrich Hapke, Juergen Schloeffel, Daniel Tille
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 27, Number 7, pp. 1329-1333, July
Jahr:


2008






» On the Construction of Small Fully Testable Circuits with Low Depth
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: On the Construction of Small Fully Testable Circuits with Low Depth





Autor:

Görschwin Fey, Anna Bernasconi, Valentina Ciriani, Rolf Drechsler
Zeitschrift:
Embedded Hardware Design - Microprocessors and Microsystems (MICPRO)
Details:
Special Issue, Volume 32, Issues 5-6, pp. 263-269
Jahr:


2008






» An Integrated Approach for Combining BDDs and SAT Provers
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: An Integrated Approach for Combining BDDs and SAT Provers





Autor:

Rolf Drechsler, Görschwin Fey, Sebastian Kinder
Zeitschrift:
Facta Universitatis, Series: Electronics and Energetics
Details:
Volume 20, Number 3, pp. 415-436
Jahr:


2007






» BDD-based Verification of Scalable Designs
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: BDD-based Verification of Scalable Designs





Autor:

Daniel Große, Rolf Drechsler
Zeitschrift:
Facta Universitatis, Series: Electronics and Energetics
Details:
Volume 20, Number 3, pp. 367-379
Jahr:


2007






» Building Free Binary Decision Diagrams Using SAT Solvers
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Building Free Binary Decision Diagrams Using SAT Solvers





Autor:

Robert Wille, Görschwin Fey, Rolf Drechsler
Zeitschrift:
Facta Universitatis, Series: Electronics and Energetics
Details:
Volume 20, Number 3, pp. 381-394,
Jahr:


2007






» Simultaneous On-Chip Bus Synthesis and Voltage Scaling Under Random On-Chip Data Traffic


Großformat der Zeitschrift: Simultaneous On-Chip Bus Synthesis and Voltage Scaling Under Random On-Chip Data Traffic





Autor:

Sujan Pandey, Manfred Glesner
Zeitschrift:
IEEE Transaction on Very Large Scale Integration (VLSI) Systems
Details:
Volume 15, Number 10, pp. 1111-1124, October
Jahr:


2007






» Technische Dokumentation von Soft- und Hardware in eingebetteten Systemen
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Technische Dokumentation von Soft- und Hardware in 
eingebetteten Systemen





Autor:

Beate Muranko, Rolf Drechsler
Zeitschrift:
it - information technology
Details:
Number 2, pp. 110-117
Pdf download
Jahr:


2007






» Exact minimisation of path-related objective functions for binary decision diagrams
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Exact minimisation of path-related objective functions for binary decision diagrams





Autor:

Rüdiger Ebendt, Rolf Drechsler
Zeitschrift:
IEE Proceedings Computer & Digital Techniques
Details:
Volume 153, Number 4, pp. 231-242, July
Jahr:


2006






» Minimizing the Number of Paths in BDDs - Theory and Algorithm
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Minimizing the Number of Paths in BDDs 
- Theory and Algorithm





Autor:

Görschwin Fey, Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 25, Number 1, pp. 4-11, January
Jahr:


2006






» Testability of SPP Three-Level Logic Networks in Static Fault Models
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Testability of SPP Three-Level Logic Networks in Static Fault Models





Autor:

Valentina Ciriani, Anna Bernasconi, Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 25, Number 10, pp. 2241-2248, October
Jahr:


2006






» The Effect of Improved Lower Bounds in Dynamic BDD Reordering
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: The Effect of Improved Lower Bounds in Dynamic BDD Reordering





Autor:

Rüdiger Ebendt, Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 25, Number 5, pp. 902-909, May
Jahr:


2006






» Combining Ordered Best-First Search with Branch and Bound for Exact BDD Minimization
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Combining Ordered Best-First Search with Branch and Bound for Exact BDD Minimization





Autor:

Rüdiger Ebendt, Wolfgang Günther, Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 24, Number 10, pp. 1515-1529, October
Jahr:


2005






» Generic Implementation of Multi-Valued Decision Diagram Packages


Großformat der Zeitschrift: Generic Implementation of Multi-Valued Decision Diagram Packages





Autor:

Rolf Drechsler, Dragan Jankovic, Radomir Stankovic
Zeitschrift:
Multiple-Valued Logic and Soft Computing
Details:
Volume 11, Numbers 1-2, pp. 1-18
Jahr:


2005






» Project-Based Learning in Student Teams in Computer Science Education
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Project-Based Learning in Student Teams in Computer Science Education





Autor:

Andreas Breiter, Görschwin Fey, Rolf Drechsler
Zeitschrift:
Facta Universitatis, Series: Electronics and Energetics
Details:
Volume 18, Number 2, August, pp. 165-180.
Jahr:


2005






» System Level Validation Using Formal Techniques
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: System Level Validation Using Formal Techniques





Autor:

Rolf Drechsler, Daniel Große
Zeitschrift:
IEE Proceedings Computer & Digital Techniques, Special Issue on Embedded Microelectronic Systems: Status and Trends
Details:
Volume 152, Number 3, pp. 393-406, May
Jahr:


2005






» Methods for Construction of Recursive Algorithms for Reed-Mulle-Fourier Polarity Matrices Calculation


Großformat der Zeitschrift: Methods for Construction of Recursive Algorithms for Reed-Mulle-Fourier Polarity Matrices Calculation





Autor:

Dragan Jankovic, Rolf Drechsler
Zeitschrift:
Multiple-Valued Logic and Soft Computing
Details:
Volume 10, Numbers 1, pp. 29-50
Jahr:


2004






» Synthesis of Fully Testable Circuits from BDDs
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Synthesis of Fully Testable Circuits from BDDs





Autor:

Rolf Drechsler, Junhao Shi, Görschwin Fey
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 23, Number 3, March
Jahr:


2004






» An Improved Branch and Bound Algorithm for Exact BDD Minimization
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: An Improved Branch and Bound Algorithm for Exact BDD Minimization





Autor:

Rüdiger Ebendt, Wolfgang Günther, Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 22, Number 12, pp. 1657-1663, December
Jahr:


2003






» Computer Architecture Core of Knowledge for Computer Science Studies







Autor:

M. Stojcev, I. Milentijevic, D. Kehagias, Rolf Drechsler, M. Gusev
Zeitschrift:
Cyprus Computer Society Journal
Details:
Volume I, Edition 4, April
Jahr:


2003






» Efficient Minimization and Manipulation of Linearly Transformed Binary Decision Diagrams
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Efficient Minimization and Manipulation of Linearly Transformed Binary Decision Diagrams





Autor:

Wolfgang Günther, Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computers
Details:
Volume 52, Number 9, pp. 1196-1209, September
Jahr:


2003






» Ein Ansatz zur formalen Verifikation von Schaltungsbeschreibungen in SystemC
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Ein Ansatz zur formalen Verifikation von Schaltungsbeschreibungen in SystemC





Autor:

Daniel Große, Rolf Drechsler
Zeitschrift:
it - information technology
Details:
Number 4, pp. 219-226, August
Jahr:


2003






» Exact Routing with Search Space Reduction
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Exact Routing with Search Space Reduction





Autor:

Frank Schmiedle, Rolf Drechsler, Bernd Becker
Zeitschrift:
IEEE Transactions on Computers
Details:
Volume 52, Number 6, pp. 815-825, June
Jahr:


2003






» Polynomial Formal Verification of Multipliers
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Polynomial Formal Verification of Multipliers





Autor:

Martin Keim, Rolf Drechsler, Bernd Becker, Michael Martin, Paul Molitor
Zeitschrift:
Formal Methods in System Design: An International Journal
Details:
Volume 22, Issue 1, pp. 39-58
Jahr:


2003






» Recursive Bi-Partitioning of Netlists for Large Number of Partitions
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Recursive Bi-Partitioning of Netlists for Large Number of Partitions





Autor:

Rolf Drechsler, Wolfgang Günther, Thomas Eschbach, Lothar Linhard, Gerhard Angst
Zeitschrift:
Journal of Systems Architecture - the Euromicro Journal
Details:
Volume 49, pp. 521-528
Jahr:


2003






» Dynamic Re-Encoding During MDD Minimization
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Dynamic Re-Encoding During MDD Minimization





Autor:

Frank Schmiedle, Wolfgang Günther, Rolf Drechsler
Zeitschrift:
Multiple-Valued Logic - An International Journal
Details:
Volume 8, Numbers 5-6, pp. 625-643
Jahr:


2002






» Heuristic Learning based on Genetic Programming
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Heuristic Learning based on Genetic Programming





Autor:

Frank Schmiedle, Nicole Drechsler, Daniel Große and Rolf Drechsler
Zeitschrift:
Genetic Programming and Evolvable Machines
Details:
Volume 3, pp. 363-388, December
Jahr:


2002






» Low Power Optimization Techniques for BDD Mapped Circuits Using Temporal Correlation
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Low Power Optimization Techniques for BDD Mapped Circuits Using Temporal Correlation





Autor:

Rolf Drechsler, Mikael Kerttu, Per Lindgren, Mitch Thornton
Zeitschrift:
Canadian Journal of Electrical and Computer Engineering
Details:
Volume 27, Number 4, pp. 159-164, October
Jahr:


2002






» Minimization of Free BDDs
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Minimization of Free BDDs





Autor:

Wolfgang Günther, Rolf Drechsler
Zeitschrift:
INTEGRATION, the VLSI Journal
Details:
Volume 32, Issue 1-2, pp. 41-59
Jahr:


2002






» Minimization of Word-level Decision Diagrams
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Minimization of Word-level Decision Diagrams





Autor:

Rolf Drechsler, Wolfgang Günther, Stefan Höreth.
Zeitschrift:
INTEGRATION, the VLSI Journal
Details:
Volume 33, Issue 1-2, pp. 39-70
Jahr:


2002






» Verifying Integrity of Decision Diagrams
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Verifying Integrity of Decision Diagrams





Autor:

Rolf Drechsler
Zeitschrift:
INTEGRATION, the VLSI Journal
Details:
Volume 32, Issue 1-2, pp. 61-75
Jahr:


2002






» Binary Decision Diagrams in Theory and Practice
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Binary Decision Diagrams in Theory and Practice





Autor:

Rolf Drechsler, Detlef Sieling
Zeitschrift:
Software Tools for Technology Transfer (STTT)
Details:
Springer, Number 3, pp. 112-136
Jahr:


2001






» Combining GAs and Symbolic Methods for High Quality Tests of Sequential Circuits
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Combining GAs and Symbolic Methods for High Quality Tests of Sequential Circuits





Autor:

Martin Keim, Nicole Drechsler, Rolf Drechsler, Bernd Becker
Zeitschrift:
Journal of Electronic Testing, Theory and Application (JETTA)
Details:
No. 17, pp. 37-51, February
Jahr:


2001






» Decision Diagram Method for Calculation of Pruned Walsh Transform
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Decision Diagram Method for Calculation of Pruned Walsh Transform





Autor:

Dragan Jankovic, Radomir Stankovic, Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computers
Details:
Volume 50, Number 2, pp. 147-157, February
Jahr:


2001






» Fault Simulation in Multi-Valued Logic Networks
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Fault Simulation in Multi-Valued Logic Networks





Autor:

Rolf Drechsler, Martin Keim, Bernd Becker
Zeitschrift:
Multiple-Valued Logic - An International Journal
Details:
Volume 7, Numbers 1-2, pp. 25-47
Jahr:


2001






» History-based Dynamic BDD Minimization
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: History-based Dynamic BDD Minimization





Autor:

Rolf Drechsler, Wolfgang Günther
Zeitschrift:
INTEGRATION, the VLSI Journal
Details:
Volume 31, Issue 1, pp. 51-63
Jahr:


2001






» Using Lower Bounds during Dynamic BDD Minimization
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Using Lower Bounds during Dynamic BDD Minimization





Autor:

Rolf Drechsler, Wolfgang Günther, Fabio Somenzi
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 20, Number 1, pp. 51-57, January
Jahr:


2001






» Äquivalenzvergleich digitaler Schaltungen im industriellen Umfeld


Großformat der Zeitschrift: Äquivalenzvergleich digitaler Schaltungen im industriellen Umfeld





Autor:

Rolf Drechsler
Zeitschrift:
it+ti - Informationstechnik und Technische Informatik
Details:
Oldenbourg Wissenschaftsverlag, Number 4, pp. 200-205
Jahr:


2001






» ACTion: Combining Logic Synthesis and Technology Mapping for MUX based FPGAs
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: ACTion: Combining Logic Synthesis and Technology Mapping for MUX based FPGAs





Autor:

Wolfgang Günther and Rolf Drechsler.
Zeitschrift:
Journal of Systems Architecture - the Euromicro Journal
Details:
Volume 46, Issue 14, pp. 1321-1334, December
Jahr:


2000






» Boolean Function Representation and Spectral Characterization Using AND/OR Graphs
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Boolean Function Representation and Spectral Characterization Using AND/OR Graphs





Autor:

Alenka Zuzek, Rolf Drechsler, Mitch Thornton
Zeitschrift:
INTEGRATION, the VLSI Journal
Details:
Volume 29, Issue 2, pp. 101-116, September
Jahr:


2000






» Fast Exact Minimization of BDDs
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Fast Exact Minimization of BDDs





Autor:

Rolf Drechsler, Nicole Drechsler, Wolfgang Günther
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 19, Number 3, pp. 384-389, March
Jahr:


2000






» Genetic Algorithm for Minimization of fixed polarity Reed-Muller expressions


Großformat der Zeitschrift: Genetic Algorithm for Minimization of fixed polarity Reed-Muller expressions





Autor:

Rolf Drechsler, Bernd Becker and Nicole Drechsler
Zeitschrift:
IEE Proceedings Computers and Digital Techniques
Details:
Volume 147, Number 5, September
Jahr:


2000






» On the Computational Power of Linearly Transformed BDDs
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: On the Computational Power of Linearly Transformed BDDs





Autor:

Wolfgang Günther, Rolf Drechsler
Zeitschrift:
Information Processing Letters
Details:
Volume 75, Nummer 3, pp. 119-125, August
Jahr:


2000






» BDD Minimization Using Symmetries
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: BDD Minimization Using Symmetries





Autor:

Christoph Scholl, Dirk Möller, Paul Molitor, Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
Details:
Volume 18, Number 2, pp. 81-100, February
Jahr:


1999






» Pseudo Kronecker Expressions for Symmetric Functions
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Pseudo Kronecker Expressions for Symmetric Functions





Autor:

Rolf Drechsler
Zeitschrift:
IEEE Transactions on Computers
Details:
Volume 48, Number 9, pp. 987-990, September
Jahr:


1999






» Testability of 2-Level AND/EXOR Circuits
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: Testability of 2-Level AND/EXOR Circuits





Autor:

Rolf Drechsler, Harry Hengster, Horst Schäfer, Joachim Hartmann, Bernd Becker
Zeitschrift:
Journal of Electronic Testing, Theory and Application (JETTA)
Details:
Volume 14, Number 3, pp. 173-192, June
Jahr:


1999






» On Variable Ordering and Decomposition Type Choice in OKFDDs
[Link zur Zeitschriften-Homepage]


Großformat der Zeitschrift: On Variable Ordering and Decomposition Type Choice in OKFDDs





Autor:

Rolf Drechsler, Bernd Becker, Andrea Jahnke
Zeitschrift:
IEEE Transactions on Computers
Details:
Volume 47, Number 12, December
Jahr:


1998






» Information reconciliation schemes in physical-layer security: A survey
[Link zur Zeitschriften-Homepage]







Autor:

Christopher Huth, Rene Guillaume, Thomas Strohm, Paul Duplys, Irin Ann Samuel, Tim Güneysu
Zeitschrift:
Computer Networks 109: 84-104 (2016)
Details:
Jahr:













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