DUHDe logo

DUHDe – 1st Workshop on
Design Automation for Understanding Hardware Designs

March 28, 2014 – Friday Workshop at DATE 2014, Dresden, Germany

 

 

 

Committee

Organizers     

Emmanuelle Encrenaz-Tiphene

Université Pierre et Marie Curie, Paris, France

Goerschwin Fey

German Aerospace Center (DLR) and University of Bremen, Germany

 

Technical PC             

Lyes Benalycherif

ST Microelectronics, Grenoble, France

Valeria Bertacco

University of Michigan, Ann Arbor, USA

Raik Brinkmann

OneSpinSolutions GmbH, Munich, Germany

Franco Fummi

Università degli Studi di Verona, Italy

Masahiro Fujita

University of Tokyo, Japan

Wenchao Li

University of California, Berkeley, USA

Tun Li

National University of Defense Technology, Changsha, China

 

 

Scope of the workshop and target audience

Understanding a hardware design is tough. When entering a large team as a new member, when extending a legacy design, or when documenting a new design, a lack in understanding the details of a design is a major obstacle for productivity. In software engineering topics like software maintenance, software understanding, reverse engineering are well established in the research community and partially tackled by tools. In the hardware area the re-use of IP-blocks, the growing size of designs and design teams leads to similar problems. Understanding of hardware requires deep insight into concurrently operating units, optimizations to reduce the required area, and specially tailored functional units for a particular use.

 

The workshop is of interest to practitioners working in circuit design and to researchers interested in design automation.

 

The aim of the 1st Workshop on Design Automation for Understanding Hardware Designs (DUHDe) is to establish a community for these topics in electronic design automation. The workshop is not limited to the following topics in design understanding but includes:

·         Design descriptions from the ESL down to RTL

·         Extraction of high-level properties

·         Localization of code implementing specialized functionality

·         Hardware design evolution : feature integration, feature interactions

·         Innovative GUIs for design

·         Managing documentation of hardware designs

·         Analysis of interaction between hardware and software

·         Formal methods for design understanding

·         Scalable approaches to design understanding

 

 

Registration

Authors of accepted contributions are required to register before the early registration deadline on Feb 28, 2014.

Registration through DATE-website for Workshop W4:
https://react-profile.org/Date2014/

 

 

Call for Posters and Submission for Final Versions

Authors of accepted contributions are required to present their work at the workshop.  Informal proceedings will be distributed electronically to the participants of the workshop. The authors retain the copyright of their work and are free to submit extended versions to a conference or journal.

Camera ready papers have to be submitted through Easychair:
https://www.easychair.org/conferences/?conf=duhde2014


Deadline for poster submissions:  February 13, 2014
Notification of acceptance: February 20, 2014
Camera ready papers: February 28, 2014
Registration of presenter: February 28, 2014 (see guidelines above)

 

 

Event format

The workshop is organized as a Friday workshop associated to DATE 2014.

 

The topic of design understanding is relatively new as a research topic in hardware. The goal of the workshop is to solicit presentations that resemble early ideas or summarize existing work. The workshop will have the following elements:

 

·         Invited talks from industry on current issues

o   Raik Brinkmann, OneSpinSolutions GmbH, Munich Germany

o   Alexander Rath, Infineon Technologies AG, Munich, Germany

o   Lyes Benalycherif, ST Microelectronics, Grenoble, France

 

·         Invited talk on the state of the art in the Software realm

o   Rainer Koschke, University of Bremen

·         Presentations: 15 minutes

·         Poster presentations: poster boards will be available

·         Panel discussion summarizing the day

 

Program

8:30 - 8:45 Opening session
Chairs: Görschwin Fey, Emmanuelle Encrenaz-Tiphéne
8:45 - 9:30 Invited talk
Managing Design Knowledge for IP Cores – State-of-the-art and Open Questions
Alexander Rath
Infineon Technologies AG, Munich, Germany
9:30 - 10:30 Technical session: Formal and semi-formal

Automatic identification of logical relationships among internal signals with small numbers of test vectors
Masahiro Fujita, Takeshi Matsumoto and Satoshi Jo
University of Tokyo, Japan

Using Natural Language Documentation in the Formal Verification of Hardware Designs
Christopher Harris and Ian Harris
University of California, Irvine, USA

Understanding Compound Systems from their Components' Properties
Syed-Hussein Syed-Alwi and Emmanuelle Encrenaz
Université Pierre et Marie Curie Paris 6, France

Design Understanding with Fast Prototyping from Assertions
Katell Morin-Allory, Fatemeh Javaheri and Dominique Borrione
Univ. Grenoble Alpes, Grenoble, France
10:30 - 11:00 Coffee break & poster presentations

Poster: Detecting Concurrency Problems in System Level Designs
Alper Sen and Onder Kalaci
Bogazici University, Istanbul, Turkey

Poster: Automatically connecting hardware blocks via light-weight matching techniques
Jan Malburg1, Niklas Krafczyk1 and Goerschwin Fey1,2
1University of Bremen, Germany   2German Aerospace Center, Bremen, Germany

Poster: Exact Solution for Trace Signal Selection with Pseudo Boolean Optimization (PBO)
Shridhar Choudhary, Kousuke Oshima, Amir Masoud Gharehbaghi, Takeshi Matsumoto and Masahiro Fujita
The University of Tokyo, Tokyo, JAPAN
11:00 - 12:00 Invited talk
Capturing and Validating Design Understanding using Formal Properties
Raik Brinkmann
OneSpinSolutions GmbH, Munich, Germany
12:00 - 13:00 Lunch
13:00 - 13:45 Invited talk
Design Understanding in SOC Development - Recent Advances and New Challenges
Lyes Benalycherif
ST Microelectronics, Grenoble, France
13:45 - 14:15 Technical session: System level productivity

DiplodocusDF: Analyzing Hardware/Software Interactions with a Dinosaur
Andrea Enrici, Ludovic Apvrille and Renaud Pacalet
Telecom ParisTech, Biot, France

Towards a Multi-dimensional and Dynamic Visualization for ESL Designs
Jannis Stoppe1, Marc Michael2, Mathias Soeken1,2, Robert Wille1,2,3 and Rolf Drechsler1,2
1DFKI GmbH, Bremen, Germany
2University of Bremen, Germany
3Technical University Dresden, Germany
14:15 - 15:00 Invited talk
Software Reverse Engineering
Rainer Koschke
University of Bremen, Germany
15:00 - 15:30 Coffee break & poster presentations (see posters above)
15:30 - 16:15 Technical session: Reverse and automatic engineering

Increasing Verilog’s Generative Power
Cherif Salama1 and Walid Taha2
1Ain Shams University, Cairo, Egypt
2Halmstad University, Halmstad, Sweden

zamiaCAD: Understand, Develop and Debug Hardware Designs
Maksim Jenihhin1, Valentin Tihhomirov1, Syed Saif Abrar1, Jaan Raik1 and Guenter Bartsch2
1Tallinn University of Technology, Estonia
2zamiaCAD, Germany

Mutation based Feature Localization
Jan Malburg1, Emmanuelle Encrenaz-Tiphene2 and Goerschwin Fey1,3
1University of Bremen, Germany
2Université Pierre et Marie Curie Paris 6, France
3German Aerospace Center, Bremen, Germany
16:15 - 17:00 Panel
Design understanding – where do industry and academia team up?
Panelists: Ian Harris, Lyes Benalycherif, Raik Brinkmann, Dominique Borrione

The panel will summarize the results of the day and prioritize topics focusing on three questions:
  • What are the most urgent topics from an industrial perspective?
  • What are the most challenging topics from an academic perspective?
  • Where can we exploit synergies between academia and industry?

 

Contact: Goerschwin Fey, University of Bremen, Germany, email: fey@informatik.uni-bremen.de