DUHDe 2016 — 3rd Workshop on Design Automation for Understanding Hardware Designs

March 18, 2016 — Friday Workshop at DATE 2016, Dresden, Germany

Scope and Target Audience

Understanding a hardware design is tough. When entering a large team as a new member, when extending a legacy design, or when documenting a new design, a lack in understanding the details of a design is a major obstacle for productivity. In software engineering topics like software maintenance, software understanding, reverse engineering are well established in the research community and partially tackled by tools. In the hardware area the re-use of IP-blocks, the growing size of designs and design teams leads to similar problems. Understanding of hardware requires deep insight into concurrently operating units, optimizations to reduce the required area, and specially tailored functional units for a particular use.

The workshop is of interest to practitioners working in circuit design and to researchers interested in design automation.

The aim of the 3rd Workshop on Design Automation for Understanding Hardware Designs (DUHDe) is to consolidate the community for these topics in electronic design automation. The workshop is not limited to the following topics in design understanding but includes:

Program

Time Talk
08:30–08:35 Workshop Opening
Ian G. Harris and Mathias Soeken
08:35–09:35 Where Are My Requirements? A Forgotten Piece of the Trustworthy Design Puzzle
Sandip Ray
09:35–10:00 Verification and debugging of scientific computations with hardware through extraction of arithmetic assertions
Masahiro Fujita
10:00–10:20 Coffee break
10:20–11:45 The Subset Permutation-Independent Conditional Equivalence Checking Problem
Mathias Soeken, Baruch Sterin, and Robert Brayton
11:45–11:10 Transparent Logic in Hardware Designs
Yu-Yun Dai and Robert Brayton
11:10–11:35 Signature-Based Sub-Circuit Extraction
Amir Masoud Gharehbaghi and Masahiro Fujita
11:35–12:00 Matching Abstract and Concrete Hardware Models for Design Understanding
Tino Flenker and Goerschwin Fey
12:00–13:20 Lunch
13:20–14:20 What can Algebraic Geometry tell us about the Function implemented by a Circuit?
Priyank Kalla
14:20–14:45 Change Management for Hardware Designers
Martin Ring, Jannis Stoppe, Christoph Lüth, and Rolf Drechsler
14:45–15:05 Coffee break
15:05–15:30 Opportunities for Analyzing Hardware Specifications with NLP Techniques
Alejandro Rago, Claudia Marcos, and J. Andres Diaz-Pace
15:30–15:55 SycView: Visualize and Profile SystemC Simulations
Denis Becker, Matthieu Moy, and Jérôme Cornet
15:55–16:20 Visualizing Microfluidic Biochips Interactively
Jannis Stoppe, Oliver Keszöcze, Robert Wille, and Rolf Drechsler
16:20–16:40 Discussions and Workshop Closing

Proceedings

The proceedings of DUHDe are only available for participants of the workshop.

Call for Papers and Submission Instructions

Prospective authors are requested to submit extended abstracts of 2 pages or full papers of 6 pages in IEEE conference style. Authors of accepted contributions are required to present their work at the workshop. Informal proceedings will be distributed electronically to the participants of the workshop. The authors retain the copyright of their work and are free to submit extended versions to a conference or journal.

Please submit papers at the following site: https://easychair.org/conferences/?conf=duhde2016

Deadline for extended abstracts or full papers: October 25, 2015 November 4, 2015
Notification of acceptance: December 4, 2015
Camera ready papers: Februrary 2, 2016

Registration

To be announced

Event Format

The workshop is organized as a Friday workshop associated to DATE 2016.

The topic of design understanding is relatively new as a research topic in hardware. The goal of the workshop is to solicit presentations that resemble early ideas or summarize existing work. The workshop includes the following invited speakers:

Committee

Organizers

Technical PC

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