# Publications

This page provides a list of all scientific papers generated within the context of this COST Action.## Articles

### 2017

[1] | Lemberski, I Asynchronous Logic Implementation Based on Factorized DIMS. In Journal of Circuits, Systems, and Computers, 2017. |

[2] | Giachino, E; Lanese, I; Mezzina, C. A and Tiezzi, F Causal-consistent rollback in a tuple-based language. In Journal of Logical and Algebraic Methods in Programming, 2017. |

### 2016

[3] | Deibuk, V Reversible/quantum ternary arithmetic logic unit design. In International journal of innovative computing, information & control, 2016. |

[4] | Hadjam, F and Moraga, C A hierarchical distributed linear evolutionary system for the synthesis of 4-bit reversible circuits. In Studies in Fuzziness and Soft Computing: 233-249, 2016. |

[5] | Vos, A. D and Baerdemacker, S. D Block-ZXZ synthesis of an arbitrary quantum circuit. In Physical Review A, 2016. |

[6] | Moraga, C Aspects of Reversible and Quantum Computing in a p-Valued Domain. In IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2016. |

[7] | Kaarsgaard, R.; Axelsen, H. B. and Glück, R. Join Inverse Categories and Reversible Recursion. In Journal of Logical and Algebraic Methods in Programming, 2016. |

[8] | Barbanera, F.; Dezani-Ciancaglini, M. and de'Liguoro, U. Reversible client/server interactions. In Formal Aspects of Computing, 2016. |

[9] | Lanese, I; Mezzina, C. A and Stefani, J.-B Reversibility in the Higher-Order Pi-Calculus. In Theoretical Computer Science, 2016. |

[10] | Morrison, D and Ulidowski, I Direction-Reversible Self-Timed Cellular Automata for Delay-Insensitive Circuits. In Journal of Cellular Automata , 2016. |

[11] | Soeken, M.; Tague, L.; Dueck, G. W. and Drechsler, R. Ancilla-free synthesis of large reversible functions using binary decision diagrams. In Journal on Symbolic Computing, 73: 1-26, 2016. |

[12] | Abdessaied, N.; Amy, M.; Drechsler, R. and Soeken, M. Complexity of reversible circuits and their quantum implementations. In Theoretical Computer Science, 618: 85-106, 2016. |

[13] | Deb, A; Das, D. K; Rahaman, H; Wille, R; Drechsler, R and Bhattacharya, B. B Reversible Synthesis of Symmetric Functions with a Simple Regular Structure and Easy Testability. In Journal on Emerging Technologies in Computing Systems, 2016. |

[14] | Wille, R; Schonborn, E; Soeken, M and Drechsler, R SyReC: A Hardware Description Language for the Specification and Synthesis of Reversible Circuits. In INTEGRATION, the VLSI Journal, 2016. |

[15] | Niemann, P; Wille, R; Miller, D. M; Thornton, M. A and Drechsler, R QMDDs: Efficient Quantum Function Representation and Manipulation. In Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2016. |

[16] | Soeken, M; Wille, R; Keszocze, O; Miller, D. M and Drechsler, R. Embedding of Large Boolean Functions for Reversible Logic. In Journal on Emerging Technologies in Computing Systems, 2016. |

### 2015

[17] | Hadam, F.Z and Moraga, C A symbolic calculus for a class of quantum computing circuits. In Electronics Letters, 2015. |

[18] | Stojkovic, S; Stankovic, M and Moraga, C Complexity reduction of Toffoli networks based on FDD. In Facta Universitatis. Series Electronics and Energetics, 2015. |

[19] | Barbanera, F and de'Liguoro, U Sub-behaviour relations for session-based client/server systems. In Mathematical Structures in Computer Science, 25 (6): 1339-1381, 2015. |

[20] | Tiezzi, F and Yoshida, N Reversible session-based pi-calculus. In Journal of Logical and Algebraic Methods in Programming, 2015. |

[21] | Phillips, I.C.C and Ulidowski, I Reversibility and asymmetric conflict in event structures. In Journal of Logical and Algebraic Methods in Programming, 2015. |

## In Proceedings

### 2017

[22] | Soeken, M.; Roetteler, M.; Wiebe, N. and De Micheli, G. Hierarchical reversible logic synthesis using LUTs. In Design Automation Conference, pages 78:1-78:6, Austin, TX, USA, 2017. |

[23] | Hierons, R. M.; Mousavi, M. R.; Thomsen, M. K. and Türker, U. C. Hardness of Deriving Invertible Sequences from Finite State Machines. In International Conference on Current Trends in Theory and Practice of Computer Science, pages 147-160, 2017. |

[24] | Zulehner, A and Wille, R Improving Synthesis of Reversible Circuits: Exploiting Redundancies in Paths and Nodes of QMDDs. In Conference on Reversible Computation, 2017. |

[25] | Zulehner, A; Gasser, S and Wille, R Exact Global Reordering for Nearest Neighbor Quantum Circuits Using A*. In Conference on Reversible Computation, 2017. |

[26] | Niemann, P; Zulehner, A; Wille, R and Drechsler, R Efficient Construction of QMDDs for Irreversible, Reversible, and Quantum Functions. In Conference on Reversible Computation, 2017. |

[27] | Al-Wardi, Z; Wille, R and Drechsler, R Towards VHDL-based Design of Reversible Circuits. In Conference on Reversible Computation, 2017. |

[28] | Surhonne, A. P.; Chattopadhyay, A and Wille, R Automatic Test Pattern Generation for Multiple Missing Gate Faults in Reversible Circuits. In Conference on Reversible Computation, 2017. |

[29] | Zulehner, A and Wille, R Skipping Embedding for Scalable Synthesis of Reversible Circuits. In International Symposium on Multiple-Valued Logic, 2017. |

[30] | Zulehner, A and Wille, R Taking One-to-one Mappings for Granted: Advanced Logic Design of Encoder Circuits. In Design, Automation and Test in Europe, 2017. |

[31] | Zulehner, A and Wille, R Make It Reversible: Efficient Embedding of Non-reversible Functions. In Design, Automation and Test in Europe, 2017. |

[32] | Soeken, M.; Roetteler, M.; Wiebe, N. and De Micheli, G. Design automation and design space exploration for quantum computers. In Design, Automation and Test in Europe, pages 470-475, Lausanne, Switzerland, 2017. |

### 2016

[33] | Soeken, M. and Chattopadhyay, A. Unlocking efficiency and scalability of reversible logic synthesis using conventional logic synthesis. In Design Automation Conference, pages 149:1-149:6, Austin, TX, USA, 2016. |

[34] | Soeken, M.; Dueck, G. W. and Miller, D. M. A fast symbolic transformation based algorithm for reversible logic synthesis. In Conference on Reversible Computation, pages 307-321, Bologna, Italy, 2016. |

[35] | Soeken, M.; Abdessaied, N. and De Micheli, G. Enumeration of reversible functions and its application to circuit complexity. In Conference on Reversible Computation, pages 255-270, Bologna, Italy, 2016. |

[36] | Mezzina, C. A. and Pérez, J. A. Reversible Semantics in Session-based Concurrency. In Theoretical Computer Science, pages 221-226, 2016. |

[37] | Mezzina, C. A. and Pérez, J. A Reversible Sessions Using Monitors. In Workshop on Programming Language Approaches to Concurrency- and Communication-Centric Software, pages 56-64, 2016. |

[38] | Medic, D. and Mezzina, C. A. Static VS Dynamic Reversibility in CCS. In Conference on Reversible Computation, pages 36-51, 2016. |

[39] | Axelsen, H. B.; Holzer, M.; Kutrib, M. and Malcher, A. Reversible Shrinking Two-Pushdown Automata. In Language and Automata Theory and Applications (LATA), 2016. |

[40] | Axelsen, H. B.; Kutrib, M.; Malcher, A. and Wendlandt, M. Boosting Reversible Pushdown Machines by Preprocessing. In Conference on Reversible Computation, 2016. |

[41] | Axelsen, H. B.; Holzer, M. and Kutrib, M. The Degree of Irreversibility in Deterministic Finite Automata. In Implementation and Application of Automata (CIAA), 2016. |

[42] | Barylska, K.; Koutny, M.; Mikulski, L. and Piatkowski, M. Reversible Computation vs. Reversibility in Petri Nets. In Conference on Reversible Computation, pages 105-118, 2016. |

[43] | Barylska, K.; Erofeev, E.; Mikulski, L.; Piatkowski, M. and Koutny, M. Reversing Transitions in Bounded Petri Nets. In Workshop on Concurrency, Specification and Programming, pages 74-85, 2016. |

[44] | Perera, R.; Garg, D. and Cheney, J. Causally Consistent Dynamic Slicing. In International Conference on Concurrency Theory, pages 18:1-18:15, 2016. |

[45] | Yüksel, M.; Erbil, S. O.; Ari, A. B and Hanay, M. S. Design and Fabrication of CSWAP Gate Based on Nano-Electromechanical Systems. In Conference on Reversible Computation, 2016. |

[46] | Moraga, C Design of p-Valued Deutsch Quantum Gates with Multiple Control Signals and Mixed Polarity. In Conference on Reversible Computation, 2016. |

[47] | Moraga, C Quantum p-Valued Toffoli and Deutsch Gates with Conjunctive or Disjunctive Mixed Polarity Control. In International Symposium on Multiple-Valued Logic, 2016. |

[48] | Hadjam, F.Z and Moraga, C Distributed RIMEP2: a Comparative Study between a Hierarchical Model and the Islands Model in the context of reversible circuits design. In International Workshop on Boolean Problems, 2016. |

[49] | Lukac, M; Kameyama, M and Moraga, C The C^nF logic gates derived from C^nNOT gates. In International Workshop on Boolean Problems, 2016. |

[50] | Stojkovic, S; Moraga, C; Stankovic, M.M and Stankovic, R.S Procedure for FDD-based reversible synthesis by levels. In International Workshop on Boolean Problems, 2016. |

[51] | Kerntopf, P; Moraga, C; Podlaski, K and Stankovic, R.S Towards Classification of Reversible Functions with Homogeneous Component Functions. In International Workshop on Boolean Problems, 2016. |

[52] | Barbanera, F and de'Liguoro, U A Game Interpretation of Retractable Contracts. In IFIP International Conference on Coordination Models and Languages, 2016. |

[53] | Axelsen, H. B. and Kaarsgaard, R. Join Inverse Categories as Models of Reversible Recursion. In International Conference on Foundations of Software Science and Computation Structures, 2016. |

[54] | Axelsen, H. B.; Glück, R. and Kaarsgaard, R. A Classical Propositional Logic for Reasoning About Reversible Logic Circuits. In International Workshop on Logic, Language, Information, and Computation, 2016. |

[55] | Dezani-Ciancaglini, M and Giannini, P Reversible Multiparty Sessions with Checkpoints. In EXPRESS/SOS'16, 2016. |

[56] | Nishida, N; Palacios, A and Vidal, G Reversible Term Rewriting. In International Conference on Formal Structures for Computation and Deduction, 2016. |

[57] | Barbieri, S; Kari, J and Salo, V The Group of Reversible Turing Machines. In Cellular Automata and Discrete Complex Systems, 2016. |

[58] | Boykett, T; Kari, J and Salo, V Strongly Universal Reversible Gate Sets. In Conference on Reversible Computation, 2016. |

[59] | Kuhn, S and Ulidowski, I A Calculus for Local Reversibility. In Conference on Reversible Computation, 2016. |

[60] | Bernadet, A and Lanese, I A Modular Formalization of Reversibility for Concurrent Models and Languages. In Interaction and Concurrency Experience , 2016. |

[61] | Tiezzi, F and Yoshida, N Reversing Single Sessions. In Conference on Reversible Computation, 2016. |

[62] | Schultz, U.P and Axelsen, H.B Elements of a Reversible Object-Oriented Language. In Conference on Reversible Computation, 2016. |

[63] | Wille, R; Keszocze, O; Othmer, L; Thomsen, M. K and Drechsler, R Generating and Checking Control Logic in the HDL-based Design of Reversible Circuits. In ised, 2016. |

[64] | Wille, R; Chattopadhyay, A and Drechsler, R From Reversible Logic to Quantum Circuits: Logic Design for an Emerging Technology. In International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, 2016. |

[65] | Wille, R; Quetschlich, N; Inoue, Y; Yasuda, N and Minato, S Using piDDs for Nearest Neighbor Optimization of Quantum Circuits. In Conference on Reversible Computation, 2016. |

[66] | Wille, R; Lye, A and Niemann, P Checking Reversibility of Boolean Functions. In Conference on Reversible Computation, 2016. |

[67] | Wille, R; Keszocze, O.; Othmer, L.; Thomsen, M. K. and Drechsler, R. Initial Ideas for Automatic Design and Verification of Control Logic in Reversible HDLs. In Conference on Reversible Computation, 2016. |

[68] | Niemann, P; Datta, R and Wille, R Logic Synthesis for Quantum State Generation. In International Symposium on Multiple-Valued Logic, 2016. |

[69] | Soeken, M.; Dueck, G. W.; Rahman, Md. M. and Miller, D. M. An extension of transformation-based reversible and quantum circuit synthesis. In International Symposium on Circuits and Systems, pages 2290-2293, Montreal, QC, Canada, 2016. |

[70] | Chattopadhyay, A.; Amaru, L. G.; Soeken, M.; Gaillardon, P-E. and De Micheli, G. Notes on majority Boolean algebra. In International Symposium on Multiple-Valued Logic, pages 50-55, Sapporo, Japan, 2016. |

[71] | Abdessaied, N.; Amy, M.; Soeken, M. and Drechsler, R. Technology mapping of reversible circuits to Clifford+T quantum circuits. In International Symposium on Multiple-Valued Logic, pages 150-155, Sapporo, Japan, 2016. |

[72] | Rahman, Md. M; Dueck, G. W; Chattopadhyay, A and Wille, R Integrated Synthesis of Linear Nearest Neighbor Ancilla-Free MCT Circuits. In International Symposium on Multiple-Valued Logic, 2016. |

[73] | Biswal, L; Bandyopadhyay, C; Chattopadhyay, A; Wille, R; Drechsler, R and Rahaman, H Nearest-Neighbor and Fault-Tolerant Quantum Circuit Implementation. In International Symposium on Multiple-Valued Logic, 2016. |

[74] | Al-Wardi, Z; Wille, R and Drechsler, R Re-writing HDL Descriptions for Line-aware Synthesis of Reversible Circuits. In International Symposium on Multiple-Valued Logic, 2016. |

[75] | Przigoda, N; Dueck, G. W; Wille, R and Drechsler, R Fault Detection in Parity Preserving Reversible Circuits. In International Symposium on Multiple-Valued Logic, 2016. |

[76] | Amaru, L; Gaillardon, P.-E; Wille, R and Micheli, G. D Exploiting Inherent Characteristics of Reversible Circuits for Faster Combinational Equivalence Checking. In Design, Automation and Test in Europe, 2016. |

[77] | Wille, R; Keszocze, O; Hillmich, S; Walter, M and Garcia-Ortiz, A Synthesis of Approximate Coders for On-chip Interconnects Using Reversible Logic. In Design, Automation and Test in Europe, 2016. |

[78] | Wille, R; Keszocze, O; Walter, M; Rohrs, P; Chattopadhyay, A and Drechsler, R Look-ahead Schemes for Nearest Neighbor Optimization of 1D and 2D Quantum Circuits. In Asia and South Pacific Design Automation Conference, 2016. |

[79] | Biswal, L; Bandyopadhyay, C; Wille, R; Drechsler, R and Rahaman, H Improving the Realization of Multiple-Control Toffoli Gates Using the NCVW Quantum Gate Library. In International Conference on VLSI Design, 2016. |

### 2015

[80] | Rawski, M. Application of Functional Decomposition in Synthesis of Reversible Circuits. In Conference on Reversible Computation, 2015. |

[81] | Rawski, M and Szotkowski, P Reversible logic synthesis of boolean functions using functional decomposition. In International Conference Mixed Design of Integrated Circuits Systems (MIXDES), 2015. |

[82] | Axelsen, H. B.; Jakobi, S.; Kutrib, M. and Malcher, A. A Hierarchy of Fast Reversible Turing Machines. In Conference on Reversible Computation, 2015. |

[83] | Holzer, M.; Jakobi, S. and Kutrib, M. Minimal Reversible Deterministic Finite Automata. In Developments in Language Theory (DLT), 2015. |

[84] | Kutrib, M. and Wendlandt, M. Reversible Limited Automata. In Machines, Computations, and Universality (MCU), 2015. |

[85] | Kutrib, M.; Malcher, A. and Wendlandt, M. When input-driven pushdown automata meet reversibility. In Non-Classical Models of Automata and Applications (NCMA), 2015. |

[86] | Kutrib, M. Reversible and Irreversible Computations of Deterministic Finite-State Devices. In Mathematical Foundations of Computer Science (MFCS), 2015. |

[87] | Kutrib, M. and Malcher, A. Real-Time Reversible One-Way Cellular Automata. In Cellular Automata and Discrete Complex Systems, 2015. |

[88] | Thomsen, M. K. and Axelsen, H. B. Interpretation and Programming of the Reversible Functional Language. In Symposium on the Implementation and Application of Functional Programming Languages, pages 8:1-8:13, 2015. |

[89] | Thomsen, M. K.; Kaarsgaard, R. and Soeken, M. Ricercar: A Language for Describing and Rewriting Reversible Circuits with Ancillae and its Permutation Semantics. In Conference on Reversible Computation, 2015. |

[90] | Heunen, C and Karvonen, M Reversible Monadic Computing. In Mathematical Foundations of Programming Semantics, 2015. |

[91] | Kuhn, S and Ulidowski, I Towards Modelling of Local Reversibility. In Conference on Reversible Computation, 2015. |

[92] | Vos, A. D and Baerdemacker, S. D On two subgroups of U($n$), useful for quantum computing. In International Colloquium on Group-theoretical Methods in Physics, 2015. |

[93] | Laursen, J.S; Schultz, U.P and Ellekilde, L.-P Automatic Error Recovery in Robot Assembly Operations Using Reverse Execution. In International Conference on Intelligent Robots and Systems, 2015. |

[94] | Schultz, U.P; Laursen, J.S; Ellekilde, L.-P and Axelsen, H.B Towards a Domain-Specific Language for Reversible Assembly Sequences. In Conference on Reversible Computation, 2015. |

[95] | Rahman, Md. M.; Soeken, M. and Dueck, G. W. Dynamic template matching with mixed-polarity Toffoli gates. In International Symposium on Multiple-Valued Logic, pages 72-77, Waterloo, ON, Canada, 2015. |

[96] | Soeken, M. and Chattopadhyay, A. Fredkin-enabled transformation-based reversible logic synthesis. In International Symposium on Multiple-Valued Logic, pages 60-65, Waterloo, ON, Canada, 2015. |

[97] | Abdessaied, N.; Soeken, M. and Drechsler, R. Technology mapping for quantum circuits using Boolean functional decomposition. In Conference on Reversible Computation, pages 219-232, Grenoble, France, 2015. |

[98] | Abdessaied, N.; Soeken, M.; Dueck, G. W. and Drechsler, R. Reversible circuit rewriting with simulated annealing. In International Conference on Very Large Scale Integration, pages 286-291, Daejon, Korea, 2015. |

[99] | Soeken, M.; Thomsen, M. K.; Dueck, G. W. and Miller, D. M. Self-inverse functions and palindromic circuits. In Reed-Muller Workshop, 2015. |

[100] | Drechsler, R and Wille, R Reversible Computation: An Alternative Computation Paradigm for Low Power Applications. In International Green and Sustainable Computing Conference, 2015. |

[101] | Niemann, P; Basu, S; Chakrabarti, A; Jha, N. K and Wille, R Synthesis of Quantum Circuits for Dedicated Physical Machine Descriptions. In Conference on Reversible Computation, 2015. |

[102] | Al-Wardi, Z; Wille, R and Drechsler, R Towards Line-aware Realizations of Expressions for HDL-based Synthesis of Reversible Circuits. In Conference on Reversible Computation, 2015. |

[103] | Kole, A; Datta, K; Sengupta, I and Wille, R Towards a Cost Metric for Nearest Neighbor Constraints in Reversible Circuits. In Conference on Reversible Computation, 2015. |

[104] | Drechsler, R and Wille, R Formal Methods for Emerging Technologies. In International Conference on Computer Aided Design, 2015. |

## Other

### 2016

[105] | Lukac, M; Kameyama, M; Perkowski, M; Kerntopf, P and Moraga, C Fault models in reversible and quantum circuits. doi.. |

[106] | Vos, A. D and Baerdemacker, S. D The group zoo of classical reversible computing and quantum computing. doi.. |

[107] | Soeken, M.; Abdessaied, N. and Drechsler, R. A framework for reversible circuit complexity. |

Reversible Computation - Extending Horizons of Computing

## Links

Memorandum of UnderstandingCOST rules and guidelines

**Contact**

**Irek Ulidowski**

Management Committee Chair

**Ivan Lanese**

Management Committee Vice Chair

**Veronica Gaspes**

STSM Coordinator

**Ralph Stuebner**

COST Science Officer

**Robert Wille**

COST Action Website Chair