Class Hierarchy
This inheritance list is sorted roughly, but not completely, alphabetically:
[detail level 12]
oCactive_controlsSlot for adding control lines automatically
oCBDDTableContains the result data for read_pla_to_bdd
oCbus_collectionCollection for buses
oCcircuitMain circuit class
oCcontrol_line_adderHelper class for adding lines in an easier way
oCcopy_metadata_settingsSettings for copy_metadata
oCcore_gate_simulationA gate simulation implementation of gate_simulation_func
oCcreate_image_settingsGeneric class for the create_image function (Template Design Pattern)
|oCcreate_pstricks_settingsImplementation of create_image_settings for generating LaTeX code using PsTricks
|\Ccreate_tikz_settingsImplementation of create_image_settings for generating LaTeX code using TikZ
oCembed_and_synthesizeConcrete re-synthesis functor for the revkit::line_reduction algorithm
oCfredkin_tagTarget Tag for Fredkin gates
oCfunction
|oCfunctor< bool(binary_truth_table &, const binary_truth_table &)>
|oCfunctor< bool(boost::dynamic_bitset<> &, const circuit &, const boost::dynamic_bitset<> &)>
|oCfunctor< bool(circuit &, const binary_truth_table &)>
|\Cfunctor< T >Functor class for interfacing algorithms
oCgateRepresents a gate in a circuit
|\Cfiltered_gateWrapper for a gate to filter some lines
oCgate_costsCalculates the gate costs
oCgraph_as_tree
|\Cconstructible_tree< Graph >This class represents a tree based on a Boost.Graph
oCline_costsCalculates the line costs
oCline_window_selectionWindow Selection functor based on Line Window Selection
oCmeasure_methodMeasure Method for timer
oCmodule_tagTarget Tag for Modules
oCoptions_description
|\Cprogram_optionsClass for program options on top of the Boost.Program_Options library
oCpatternPattern file for sequential simulation
oCperes_tagTarget Tag for Peres gates
oCprint_circuit_settingsSettings for print_circuit function
oCprint_statistics_settingsSettings for print_statistics
oCprint_timerFunctor for the timer class which prints the run-time to an output stream
oCpropertiesProperty Map for storing settings and statistical information
oCproperties_timerFunctor for the timer class which assigns the run-time to a property map
oCquantum_costsCalculates the quantum costs
oCread_pla_settingsSettings for read_pla function
oCreference_timerFunctor for the timer class which assigns the run-time to a given variable
oCresynthesis_optimizationRe-synthesis optimization (Wrapper for window_optimization)
oCrevlib_processorBase class for actions on the revlib_parser
|oCcircuit_processorImplementation of revlib_processor to construct a circuit
|\Cspecification_processorImplementation of revlib_processor to construct a reversible_truth_table
oCshift_window_selectionWindow Selection functor based on Shift Window Selection
oCstandard_circuitRepresents a circuit
oCstandard_decompositionDefault gate-wise decomposition
oCsubcircuitRepresents a sub-circuit
oCtarget_line_adderHelper class for adding lines in an easier way
oCtimer< Outputter >A generic timer class
oCtoffoli_tagTarget Tag for Toffoli gates
oCtransistor_costsCalculates the transistor costs
oCtruth_table< T >Represents a truth table
oCv_tagTarget Tag for V gates
oCvplus_tagTarget Tag for V+ gates
oCweighted_reorderingCubes reordering strategy as proposed in [FTR07]
oCwrite_blif_settingsSettings for write_blif
oCwrite_realization_settingsSettings for write_realization function
oCwrite_specification_settingsSettings for write_specification
\Cwrite_verilog_settingsSettings for write_verilog

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