Overview

This page should give an outline of all components in the libraries.

Core

gateGate class
circuitCircuit class
functorGeneric Functor Implementation based on Boost.Function.
propertiesProperty Map Implementation for Algorithms
target_tagsPredefined target type tags for common gate types
truth_tableClass for truth table representation
Functions
add_circuitPrepending, inserting and appending circuits to another circuit
add_gatesAdding typical gates to a circuit
add_line_to_circuitAdd a line to a circuit with specifying all meta-data
circuit_to_truth_tableGenerates a truth table from a circuit
clear_circuitClears a circuit
control_linesGets the control lines of a gate
copy_circuitCopies a circuit
copy_metadataCopies meta-data from a specification to a circuit
expand_circuitExpand a circuit on the base of a sub circuit
extend_truth_tableRemoves the Don't Care Values of a binary truth table
find_linesFinds empty and non-empty lines in circuits and gates
fully_specifiedDetermines whether a truth_table is fully specified
reverse_circuitReverse a circuit
target_linesGets the target lines of a gate
I/O
create_imageLaTeX functions for printing circuits
print_circuitConsole output of a circuit
print_statisticsPrint statistics about a circuit
read_realizationParser for RevLib realization (*.real) file format
read_specificationParser for RevLib specification (*.spec) file format
read_plaReads a specification from a PLA file
revlib_parserRevLib file format parser
revlib_processorProcessor which works with the revlib_parser
write_blifWrites a circuit to a BLIF file
write_realizationGenerator for RevLib realization (*.real) format
write_specificationWrites a truth table to a RevLib specification file
Utils
costsCost calculation for circuits
program_optionsEasier access to program options
timerA generic way for measuring time

Algorithms

Optimization
line_reductionLine Reduction Optimization
window_optimizationWindow Optimization
Synthesis
bdd_synthesisBDD Based Synthesis
embed_truth_tableEmbedding of an irreversible specification
esop_synthesisESOP Based Synthesis
exact_synthesisExact Synthesis of Reversible Networks
kfdd_synthesisKFDD Based Synthesis
quantum_decompositionQuantum Decomposition of Reversible Circuits
swopSWOP - Synthesis With Output Permutation
transformation_based_synthesisTransformation Based Synthesis
Simulation
partial_simulationSimulation considering constant inputs and garbage outputs
simple_simulationVery simple simulation, only efficient for small circuits
Verification
equivalence_checkSAT-based equivalence check (respects garbage outputs and constant inputs)

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