@InProceedings{WSG+:2011b,
  author        = {Robert Wille and Mathias Soeken and Daniel Gro{\ss}e and E. Sch\"onborn and Rolf Drechsler},
  title         = {Designing a RISC CPU in Reversible Logic},
  pages         = {170--175},
  BOOKTITLE     = ismvl,
  year          = 2011
}