CV and selected PublicationsRolf Drechsler published more than 20 books and 300 scientific papers in international journals
A. Sayed-Ahmed, D. Große, U. Kühne, M. Soeken, and R. Drechsler.|
Formal verification of integer multipliers by combining Gröbner basis with logic reduction,
In Design, Automation and Test in Europe, pp. 1048-1053, 2016. (Best Paper Candidate)
|H. Riener, F. Haedicke, S. Frehse, M. Soeken, D. Große, R. Drechsler, G. Fey.|
metaSMT: focus on your application and not on solver integration, In International Journal on Software Tools for Technology Transfer, pp 1-17, 2016.
H. M. Le, D. Große, V. Herdt, R. Drechsler.|
Verifying SystemC using an Intermediate Verification Language and Symbolic Simulation,
In Design Automation Conference, pp. 116:1-6, 2013.
S. Eggersglüß, R. Wille, R. Drechsler.|
Improved SAT-based ATPG: more constraints, better compaction,
In International Conference on Computer-Aided Design, pp. 85-90, 2013. (Best Paper Award)
R. Wille, Rolf Drechsler.|
BDD-based Synthesis of Reversible Logic for Large Functions,
In Design Automation Conference, pp. 270-275, 2009.
D. Große, U. Kühne, R. Drechsler.|
Analyzing Functional Coverage in Bounded Model Checking,
In Transactions on Computer Aided Design of Integrated Circuits and Systems, Volume 27, Number 7, pp. 1305-1314, 2008.
R. Drechsler, S. Eggersglüß, G. Fey, A. Glowatz, F. Hapke, J. Schloeffel and D. Tille.|
On Acceleration of SAT-based ATPG for Industrial Designs,
In Transactions on Computer Aided Design of Integrated Circuits and Systems, Volume 27, Number 7, pp. 1329-1333, 2008.
G. Fey, S. Staber, R. Bloem, R. Drechsler.|
Automatic Fault Localization for Property Checking,
In Transactions on Computer Aided Design of Integrated Circuits and Systems, Volume 27, Number 6, pp. 1138-1149, 2008. Preliminary version received Best Paper Award at HVC2006.