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BOOKS

» Automated Analysis of Virtual Prototypes at the Electronic System Level – Design Understanding and Applications
[Read more about this book!]



Publisher:


Springer
Author:

Mehran Goli, Rolf Drechsler
Format:
Hardcover
Year:


2020





BOOK CONTRIBUTIONS
» Automatisierte Analyse virtueller Prototypen auf der ESL
Bigpicture: Ausgezeichnete Informatikdissertationen 2019 Author:

Mehran Goli

Editor:S. Hölldobler et al.
Booktitle:Ausgezeichnete Informatikdissertationen 2019
Publisher:GI
Sites:89-98
Year:2019
Format:Paperback





JOURNALS

» Early SoCs Information Flow Policies Validation using SystemC-based Virtual Prototypes at the ESL
[Link to the Homepage of this journal]




Author:

Mehran Goli, Rolf Drechsler
Journal:
ACM Transactions on Embedded Computing Systems (TECS)
Details:
accepted
Year:


2022





» Through the Looking Glass: Automated Design Understanding of SystemC-based VPs at the ESL
[Link to the Homepage of this journal]




Author:

Mehran Goli, Rolf Drechsler
Journal:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)
Details:
accepted
Year:


2021





» PREASC: Automatic Portion Resilience Evaluation for Approximating SystemC-based Designs using Regression Analysis Techniques
[Link to the Homepage of this journal]




Author:

Mehran Goli, Rolf Drechsler
Journal:
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Details:
volume: 25, number: 5, numpages: 28, URL: https://doi.org/10.1145/3388140, DOI: 10.1145/3388140
Year:


2020





» Security Validation of VP-based SoCs Using Dynamic Information Flow Tracking
[Link to the Homepage of this journal]




Author:

Mehran Goli, Muhammad Hassan, Daniel Große, Rolf Drechsler
Journal:
it-Information Technology
Details:
accepted
Year:


2019





» Automated Non-intrusive Analysis of Electronic System Level Designs
[Link to the Homepage of this journal]




Author:

Mehran Goli, Jannis Stoppe, Rolf Drechsler
Journal:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Details:
volume: 39, number: 2, pages: 492-505, URL: https://doi.org/10.1109/TCAD.2018.2889665, DOI: 10.1109/TCAD.2018.2889665,
Year:


2020






CONFERENCES



» FELOPi: A Framework for Simulation and Evaluation of Post-Layout File Against Optical Probing




Author:

Sajjad Parvin, Mehran Goli, Frank Sill Torres, Rolf Drechsler
Conference:
Design, Automation and Test in Europe (DATE)
Reference:

Antwerp, Belgium, 2023
Hyperlink:

[To the Site of this Conference]



» Trojan-D2: Post-Layout Design and Detection of Stealthy Hardware Trojans - a RISC-V Case Study




Author:

Sajjad Parvin, Mehran Goli, Frank Sill Torres, and Rolf Drechsler
Conference:
28th Asia and South Pacific Design Automation Conference (ASP-DAC)
Reference:

Tokyo, Japan, 2023
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» EDDY: A Multi-Core BDD Package With Dynamic Memory Management and Reduced Fragmentation




Author:

Rune Krauss, Mehran Goli, Rolf Drechsler
Conference:
Asia and South Pacific Design Automation Conference (ASP-DAC)
Reference:

Tokyo, Japan, 2023
Hyperlink:

[To the Site of this Conference]



» Towards Neural Hardware Search: Power Estimation of CNNs for GPGPUs with Dynamic Frequency Scaling




Author:

Christopher Metz, Mehran Goli, Rolf Drechsler
Conference:
ACM/IEEE Workshop on Machine Learning for CAD (MLCAD)
Reference:

Snowbird, USA, 2022
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Early Performance Estimation of Embedded Software on RISC-V Processor using Linear Regression




Author:

Weiyan Zhang, Mehran Goli, Rolf Drechsler
Conference:
25th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
Reference:

Prague, Czech Republic, 2022
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Towards Polynomial Formal Verification of Complex Arithmetic Circuits




Author:

Rolf Drechsler, Alireza Mahzoon, Mehran Goli
Conference:
25th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
Reference:

Prague, Czech Republic, 2022
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» ML-based Power Estimation of Convolutional Neural Networks on GPGPUs




Author:

Christopher Metz, Mehran Goli, Rolf Drechsler
Conference:
25th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
Reference:

Prague, Czech Republic, 2022
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Early Validation of SoCs Security Architecture Against Timing Flows Using SystemC-based VPs




Author:

Mehran Goli, Rolf Drechsler
Conference:
International Conference on Computer Aided Design (ICCAD)
Reference:

Munich, Germany, 2021
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» VIP-VP: Early Validation of SoCs Information Flow Policies using SystemC-based Virtual Prototypes




Author:

Mehran Goli, Rolf Drechsler
Conference:
Forum on Specification & Design Languages (FDL)
Reference:

Antibes, France, 2021
Best Paper Award
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Work-in-Progress: Early Power Estimation of CUDA-based CNNs on GPGPUs




Author:

Christopher Metz, Mehran Goli, Rolf Drechsler
Conference:
International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)
Reference:

VIRTUAL CONFERENCE, 2021
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Automated Debugging-Aware Visualization Technique for SystemC HLS Designs




Author:

Mehran Goli, Alireza Mahzoon, Rolf Drechsler
Conference:
Euromicro Conference on Digital System Design (DSD)
Reference:

Palermo, Sicily, Italy, 2021
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» ATLaS: Automatic Detection of Timing-based Information Leakage Flows for SystemC HLS Designs




Author:

Mehran Goli, Rolf Drechsler
Conference:
26th Asia and South Pacific Design Automation Conference (ASP-DAC)
Reference:

Tokyo, Japan, 2021
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» ASCHyRO: Automatic Fault Localization of SystemC HLS Designs Using a Hybrid Accurate Rank Ordering Technique




Author:

Mehran Goli, Alireza Mahzoon, Rolf Drechsler
Conference:
38th IEEE International Conference on Computer Design (ICCD)
Reference:

Hartford, USA, 2020
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Automated Design Understanding of SystemC-based Virtual Prototypes: Data Extraction, Analysis and Visualization




Author:

Mehran Goli, Rolf Drechsler
Conference:
IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Reference:

Limassol, Cyprus, 2020
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Towards Generation of a Programmable Power Management Unit at the Electronic System Level




Author:

David Lemma, Mehran Goli, Daniel Große, Rolf Drechsler
Conference:
23rd IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
Reference:

Novi Sad, Serbia, 2020
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Scalable Simulation-based Verification of SystemC-based Virtual Prototypes




Author:

Mehran Goli, Rolf Drechsler
Conference:
EUROMICRO Digital System Design Conference (DSD)
Reference:

Kallithea - Chalkidiki, Greece, 2019
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Automated Analysis of Virtual Prototypes at Electronic System Level




Author:

Mehran Goli, Muhammad Hassan, Daniel Große, Rolf Drechsler
Conference:
29th ACM Great Lakes Symposium on VLSI (GLSVLSI)
Reference:

Washington, D.C., USA, 2019
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Power Intent from Initial ESL Prototypes: Extracting Power Management Parameters




Author:

David Lemma, Mehran Goli, Daniel Große, Rolf Drechsler
Conference:
IEEE Nordic Circuits and Systems Conference (NORCAS)
Reference:

Tallinn, Estonia, 2018
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Resilience Evaluation for Approximating SystemC Designs Using Machine Learning Techniques




Author:

Mehran Goli, Jannis Stoppe, Rolf Drechsler
Conference:
IEEE International Symposium on Rapid System Prototyping (RSP), 2018
Reference:

Torino, Italy, 2018
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Automatic Protocol Compliance Checking of SystemC TLM-2.0 Simulation Behavior Using Timed Automata




Author:

Mehran Goli, Jannis Stoppe, Rolf Drechsler
Conference:
35th IEEE International Conference on Computer Design (ICCD)
Reference:

Boston Area, Massachusetts, USA, 2017
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» Automatic Equivalence Checking for SystemC-TLM 2.0 Models Against their Formal Specifications




Author:

Mehran Goli, Jannis Stoppe, Rolf Drechsler
Conference:
Design, Automation and Test in Europe (DATE)
Reference:

Lausanne, Switzerland, 2017
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]



» AIBA: an Automated Intra-Cycle Behavioral Analysis for SystemC-based Design Exploration




Author:

Mehran Goli, Jannis Stoppe, Rolf Drechsler
Conference:
IEEE International Conference on Computer Design (ICCD)
Reference:

Phoenix, USA, 2016
Hyperlink:

[To the Site of this Conference]
PDF:

[view Pdf]


WORKSHOPS




» Simulation-based Verification of SystemC-based VPs at the ESL




Author:

Mehran Goli, Rolf Drechsler
Workshop:
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
Reference:

Virtual, 2022
PDF:

[view Pdf]
Hyperlink:

[Link to the Workshop]



» Pick the Right Edge Device: Towards Power and Performance Estimation of CUDA-based CNNs on GPGPUs




Author:

Christopher Metz, Mehran Goli, Rolf Drechsler
Workshop:
System-level Design Methods for Deep Learning on Heterogeneous Architectures (SLOHA)
Reference:

Grenoble, France, 2021
PDF:

[view Pdf]
Hyperlink:

[Link to the Workshop]



» Integrating Hybrid Analysis with Machine Learning Techniques for Portion Resilience Evaluation in Approximating SystemC-based Designs




Author:

Mehran Goli, Rolf Drechsler
Workshop:
Workshop on Machine Learning for CAD (MLCAD)
Reference:

Canmore (Banff Area), Alberta, Canada, 2019
Hyperlink:

[Link to the Workshop]

















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