// This is a SyReC-file describing a simple hierarchical circuit.
// This file has been taken from RevLib (www.revlib.org). 

module ifmod( in x(1), inout y, inout z )
  if x
    then
      y += z
    else
      z -= y
  fi x

module main( in a(1), inout x, inout y )
  call ifmod( a, x, y )
