20. Workshop „Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen”

8. - 9. Februar 2017, Haus der Wissenschaft, Bremen

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Programm

Mittwoch, 08.02.2017

08:15–08:45 Registrierung
08:45–09:00 Begrüßung und Eröffnung
09:00–10:00 Eingeladener Vortrag
Dr. Raik Brinkmann, CEO OneSpin Solutions GmbH
Functional Safety in Automotive Chip Design
Moderation: Rolf Drechsler
10:00–10:30 Kaffeepause
10:30–12:00 Session 1: Formale Verifikation und Statische Analyse
Moderation: Jürgen Ruf
Tobias Seufert and Christoph Scholl
Sequential Verification Using Reverse PDR
Felix Neubauer, Karsten Scheibler, Bernd Becker, Ahmed Mahdi, Martin Fränzle, Tino Teige, Tom Bienmüller and Detlef Fehrer
Accurate Dead Code Detection in Embedded C Code by Arithmetic Constraint Solving
M. Ammar Ben Khadra, Dominik Stoffel and Wolfgang Kunz
Speculative disassembly of binary code
12:00–13:30 Mittagspause
13:30–15:00 Session 2: Synthese
Moderation: Christoph Scholl
Heinz Riener, Rüdiger Ehlers and Görschwin Fey
Counterexample-Guided EF Synthesis of Boolean Functions
Amrutansh Gudivada, Daniel Kriesten, Ulrich Heinkel, Rene Röllig and Matthias Lenk
OpenCL- Design Flow for High Level Synthesis and Cross-Platform Portability
Patrick Sittel, Martin Kumm, Konrad Möller, Martin Hardieck and Peter Zipf
High-Level Synthesis for Model-Based Design with Automatic Folding including Combined Common Subcircuits
15:00–15:30 Kaffeepause
15:30–17:00 Session 3: Optimierung
Moderation: Jürgen Teich
Shrinidhi Udupi, Joakim Urdahl, Dominik Stoffel and Wolfgang Kunz
Dynamic Power Optimization based on Formal Property Checking of Operations
Tobias Strauch
A Novel RTL ATPG Model Based on Gate Inherent Faults of Complex Gates
Benjamin Beichler, Michael Rethfeldt, Hannes Raddatz, Björn Konieczek, Peter Danielis, Christian Haubelt and Dirk Timmermann
Optimization of a novel WLAN Simulation Framework for Prototyping Network Applications and Protocols
17:00–18:00 Fachgruppensitzung
19:00–22:30 Social Event an Bord des Gastronomieschiffs Alexander von Humboldt

Donnerstag, 09.02.2017

09:00–10:00 Eingeladener Vortrag
Prof. Michael Beetz PhD, AG Künstliche Intelligenz, Universität Bremen
Autonomous Robots performing Everyday Manipulation Tasks - The Biggest Challenge for System Modelling and Validation?
Moderation: Daniel Große
10:00–10:30 Kaffeepause
10:30–12:00 Session 4: Analog Mixed-Signal
Moderation: Jens Schönherr
Christoph Grimm and Carna Radojicic
Extending Affine Arithmetic for Formal Verification of Analog/Mixed-Signal Systems
Sebastian Simon, Jerome Kirscher, Alexander Rath, Zhiqiang Zhang and Linus Maurer
Pre-silicon Verification of an Automotive Battery Management System in the Context of the Application
Thiyagarajan Purusothaman and Christoph Grimm
SystemC AMS based Co-simulation Framework for Cyber Physical Systems
12:00–13:30 Mittagspause
13:30–15:00 Session 5: Zukünftige Technologien
Moderation: Christoph Grimm
Leonard Schneider, Oliver Keszocze, Jannis Stoppe and Rolf Drechsler
Einfluss von Zellformen auf das Routing von Digital Microfluidic Biochips
Andreas Grimmer, Werner Haselmayr, Andreas Springer and Robert Wille
Verifikation von Networked Labs-on-Chip Architekturen
Saman Fröhlich, Daniel Große and Rolf Drechsler
Exakte BDD Minimierung mit Fehlerschranke für den Einsatz im Approximate Computing
15:00–15:30 Kaffeepause
15:30–17:00 Session 6: Zuverlässigkeit und Power
Moderation: Martin Radetzki
Hananeh Aliee, Abbas Banaiyianmofrad, Michael Glaß, Jürgen Teich and Nikil Dutt
Redundancy-aware Design Space Exploration for Memory Reliability in Many-cores
Hussam Amrouch and Jörg Henkel
Containing Guardbands: From the Macro to Micro Time Domain
Ralf Stemmer and Maher Fakih
Towards Timing and Power Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication
17:00–17:10 Verabschiedung


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