ETS2 Session 1:
Tuesday May 29, 11:00 - 12:30
Emerging IEEE Standards for DFT of Mixed-Signal ICs
This session addresses practical aspects of three standards being developed by IEEE Working Groups for more efficient testing of mixed-signal ICs.
P1687.1 standardizes digital test access via commonly used non-JTAG ports, P1687.2 standardizes the description of analog tests and test access, and
P2427 standardizes the reporting of defect coverage achieved by analog tests. These groups hope to complete these standards before ETS'19, and are
looking forward to intense discussions and concrete feedback from this ETS2 session.
Indicative (time schedule) of the session and the introductory presentations:
|11:00 : Jeff Rearick, AMD:
||"P1687.1 and .2 - Facilitating systematic testing and test access for all ICs"
|11:15 : Stephen Sunter, Mentor:
||"P2427 - Consistent measurement and reporting of analog test coverage"
|11:30 : Vladimir Zivkovic, Cadence:
||"Practical aspects of delivering testable mixed-signal IP blocks: Will new standards help?"
|11:45 : general discussion||
ETS2 Session 2:
Tuesday May 29, 14:00 - 15:30
ETS2 Session 3:
Tuesday May 29, 16:00 - 17:30
Data sharing in the IC supply chain, a good or a bad idea?
The 2nd as well as the 3rd ETS2 session will discuss the opportunities, challenges, roadblocks etc. on sharing (test)data in the IC supply chain.
This topic is very broad and basically covers all the testing done by the various stakeholders in the complete IC supply chain, from the foundry via the (fabless)
IC supplier and the board/system integrator to the system supplier. We specifically try to focus on the (potential) relations between all those dedicated test
activities in the supply chain, for instance by trying to answer some questions, like: "why don't we share more information on for instance (test)data results?
Doesn't it make sense, or is it too cumbersome and has it all kind challenges and too much roadblocks?"
No doubt that, besides technical aspects also business issues can/will be discussed.
We will have key reps from a foundry, from (fabless) IC suppliers, from a system company and from a data analysis company. That looks great and will for sure
result in interesting sessions and in lively discussions with a hopefully large and active audience.
Topics that will be introduced by the speakers include, but are not limited to, screening defects in package assembly, system level testing (SLT), potential
benefits on sharing data as well as challenges and roadblocks, what data can be shared and at what "costs"?, etc.
By the end of the sessions we then may have a pretty good idea on how data sharing could work, if at all, and what it potentially can bring. We hopefully can
tell which roadblocks should be removed, and make a head start removing them. It also would be nice to come up with a kind of model or roadmap to make data
sharing really happening shortly.
Indicative list of speakers that will introduce the topic:
Robert van Rijsinge and Stefan Eichenberger (NXP),
Davide Appello (ST)
Viktor Mueller (Continental)
Harry Chen (Mediatek),
Paul Simon (Qualtera),
tbd a foundry rep (Globalfoundries?, …)